          IDENT  DFT2,70B
          CIPPU  J
          MEMSEL 16
          BASE   MIXED
          TITLE  CTM$DFT 835 CLASS (DFT2).
          COMMENT *SMD* LVL=11
          COMMENT COPYRIGHT CONTROL DATA SYSTEMS INC. 1992
 DFT      SPACE  4,10
***       DFT - DEDICATED FAULT TOLERANCE.
*         B. R. HANSON.      82/06/21. (PRECURSOR KNOWN AS SMU)
*         G. J. FALCONER.    85/08/05. (DFT V1.0)
*         G. J. FALCONER.    86/02/27. (DFT V2.0)
*         G. J. FALCONER.    87/11/20. (DFT V4.0)

 DFT      SPACE  4,10
***       DFT PERFORMS:
*
*         1) CTM$DFT_835_CLASS WILL PROCESS ERRORS FOR THE CONTROL DATA
*         MODEL 835 COMPUTER SYSTEM. THE ERRORS LOGGED AND CLEARED ARE
*         THOSE THAT OCCUR IN THE CPU, IOU, OR CENTRAL MEMORY ELEMENTS AND
*         RESULT IN THE STATUS SUMMARY BIT 59 (SUMMARY STATUS) BIT BEING SET.
*
*         2) DFT WILL ALSO PERFORM A SEQUENCE OF STEPS TO DEADSTART THE SYSTEM FROM
*         C170 STATE OPERATION TO DUAL-STATE OPERATION OR TO RETURN IT TO
*         STANDALONE C170 OPERATION.  THIS IS PERFORMED UPON THE REQUEST
*         OF THE PP BOOT (*VPB* STATE OF *SCI*).
*
*         4) PROVIDING EXTERNALIZATIONS OF *2AP* FUNCTIONS TO NOS/VE.
 CONTROL  SPACE  4,10
**        ASSEMBLY PARAMETERS.

 PPTYPE   EQU    0           TURN ON TRACKING OF UPPER/LOWER PP
 PRGM     SET    2           SET *OVERLAY* MACRO TO *DFT* NAMES
*STEP$    SET    0           ASSEMBLE *STEP* CODE IF SYMBOL DEFINED

          LIST   X
*COPY     CTP$DFT_RELEASE_HISTORY
*COPY     CTH$DEDICATED_FAULT_TOLERANCE
          LIST   *
 COMMON   SPACE  4,10
**        COMMON DECKS.


*COPYC DSI$PP_MACROS
*COPYC DSI$MAINTENANCE_REGISTER_MACROS
*COPYC CTI$COMPASS_OS_LEVELS
*COPYC CTC$DFT_MACROS
*COPYC CTC$DFT_DIRECT_CELLS
*COPYC CTI$DFT_ANALYSIS_CODES
*COPY DSC$PP_MR_AND_TPM_CONSTANTS
*COPY CTC$DFT_CONSTANTS
*COPY CTC$DFT_ACTION_NO_OVERFLOW
*COPY DSA$HARDWARE_TABLE_DEFINITIONS
*COPY DSA$VE_REQUESTS_TO_DFT
          LIST   *
*COPY DSI$PP_INSTRUCTION_MNEMONICS
          LIST   X
*COPY CTC$EI_CONTROL_BLOCK
          LIST   *

**        START DEFINITION OF THE MAIN LOOP OF DFT.
*

*COPYC CTP$DFT_MAIN_LOOP
 UTE      SPACE  4,10
**        UTE - UPDATE WALL CLOCK CHIP TIME IN EICB
*
*         STUB ON 835


 UTE      SUBR               ENTRY/EXIT
          UJN    UTEX
*COPYC CTP$DFT_MAIN_LOOP_DUAL_STATE
*COPYC CTP$DFT_MAIN_LOOP_NO_PACKETS
 CRN      SPACE  4,10
**        CRN - CHECK RELOCATION NECESSARY
*
*         STUB ON A 835

 CRN      SUBR               ENTRY/EXIT
          UJN    CRNX
 CPC      SPACE  4,10
**        CPC - CHECK FOR PACKET COMMUNICATION
*
*         STUB ON 835

 CPC      SUBR               ENTRY/EXIT
          UJN    CPCX

**        END OF DFT MAIN LOOP DEFINITIONS

*COPYC CTC$DFT_GLOBAL_DATA
*COPYC CTC$DFT_GLOBAL_DATA_NON_S0
 CELCW    CON    0           IGNORED ON 810,815,825,830
*COPYC CTP$DFT_RESIDENT_COMMON
*COPYC CTP$DFT_RESIDENT_ECM_NON_S0
*copy dsi$find_cip_module
*copy dsi$get_hardware_element
*COPYC CTP$MR_PROTOCOL_PREPROCESS
*COPYC CTP$MR_RETRY_OPERATION_FOR_DFT
*COPYC CTP$MR_PROTOCOL_PROCESS
*COPYC CTP$MR_PROTOCOL_POSTPROCESS
*copy DSI$PP_UTILITY_SUBROUTINES
          USE    PRESET
          QUAL   PRESET
*COPYC CTP$DFT_PRESET
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_PRESET_NON_DUAL_I4
 SPO      SPACE  4,10
**        SPO - SETUP MEMORY PORT OFFSET.
*
*         EXIT   PO IS SET TO THE MODEL DEPENDENT PORT OFFSET.
*
*         USES   PO.


 SPO      SUBR               ENTRY/EXIT
          LDN    4           SETUP MEMORY PORT OFFSET
          STD    PO
          UJN    SPOX        RETURN
          USE    *
          QUAL   *
          OVERLAY  (RESIDENT PART II),R2ORG
          QUAL   *
*COPYC CTP$DFT_RESIDENT_II_NON_990
*COPYC CTP$DFT_RESIDENT_II_COMMON
*COPYC CTP$DFT_NON_930_RESIDENT_II
*COPYC DSI$PACK_UNPACK_REGISTERS
*COPYC DSI$VALIDATE_PP_BOUNDS
          USE    OVERFLOW
          ERRNG  10000-*     RESIDENT II OVERFLOWS PP
*COPYC CTP$DFT_PRESET_BUILD_STRUCTURE
          OVERLAY (STANDARD PRESET OVERLAY ROUTINES)
*COPYC CTP$DFT_PRESET_STANDARD_OVL
 SSO      SPACE  4,10
**        SSO - PRESET  SPECIAL OVERLAY FOR IOU BIT 57 ERROR.
*         NON OPERATIONAL HERE.


 SSO      SUBR
          UJN    SSOX        RETURN

*COPY CTP$DFT_RETURN_ERROR_CODE
 SMV      SPACE  4,10
**        SMV - SETUP MODEL DEPENDENT VALUES.
*
*         *SMV* WILL SET UP REGISTER LIST ADDRESSES ON A MODEL DEPENDENT BASIS, AND
*         WILL INITIALIZE ALL MODEL DEPENDENT GLOBAL DATA.


 SMV      SUBR               ENTRY/EXIT
          LDC    SXIU        UNCORRECTED REG LIST FOR IOU
          STM    IO0U        SAVE LIST ADDRESS
          STM    IO0C
          LDC    SXMA
          STM    ME0U        UNCORRECTED MEMORY ERROR LIST
          STM    ME0C        CORRECTED MEMORY ERROR LIST
          LDC    S2PC
          STM    CP0C       CORRECTED ERROR LIST
          LDC    S2PU
          STM    CP0U       UNCORRECTED ERROR LIST

*         835 MODELS DONT HAVE WALL CLOCK CHIPS SO CHECK IF EICB
*         LEVEL SUPPORTS ONE AND IF IT DOES WRITE DEFAULT VALUE
*         THERE.

          LDN    D7TY
          RJM    IIB
          CRDL   T4          READ D7TY OF EICB
          LDD    T7
          SHN    -6
          SBN    4
          MJN    SMV10       IF EICB DOES NOT SUPPORT TIMESTAMP FIELD
          LDN    0           ZERO OUT THE TIMESTAMP FIELD IN THE EICB
          STDL   T1
          STDL   T2
          STDL   T3
          STDL   T4
          LDN    D8WT
          RJM    IIB         INCREMENT INTERFACE BUFFER
          CWDL   T1          WRITE DEFAULT TIME VALUE TO EICB
 SMV10    LJM    SMVX        RETURN
*COPY     CTP$DFT_NO_CLEAR_PACKETS
*COPYC CTP$DFT_PRESET_NON_PACKETS
          OVERLAY  (MAIN NON-RESIDENT ROUTINES)

**        START OF THE MAIN NON RESIDENT ROUTINES OVERLAY. ON CYBER 835
*         THIS OVERLAY DEFINES ROUTINES FOR DUAL STATE, NON DUAL I4
*         NON HALT ON ERROR PROCESSING, AND NO PACKET COMMUNICATION.



*COPYC CTP$DFT_MAIN_NON_RES_RTNS
*COPYC CTP$DFT_MAIN_NON_RES_NON_I4
*COPYC CTP$DFT_MAIN_NON_RES_DUAL_STATE
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPY CTP$DFT_PREPARE_FOR_CIP_CALL
*COPYC CTP$DFT_CPU_HANDSHAKER
 BCA      SPACE  4,10
**        BCA - HANDLE BLOCKED CM ACCESS.
*         THIS IS VALID ON A MODEL 44,43 IOU ONLY. (STUB HERE)
          QUAL   HB57


 BCA      SUBR
          UJN    BCAX        RETURN
          QUAL   *

 HOE      SPACE  4,10
**        HOE - HALT ON ERROR
*
*         STUB ON AN 835


          ROUTINE HOE
          LJM    HOEX

 RED      SPACE  4,10
**        RED - READ 960 POWER MONITOR.
*
*         ON ANY MACHINE OTHER THAN THE 960 THIS ROUTINE IS
*         NON FUNCTIONAL.


          ROUTINE RED
          LJM    REDX

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DO DFT ACTIONS)

*COPYC CTP$DFT_ACTION_LIST
*COPYC CTP$DFT_ACTION_LIST_OVERFLOW
*COPYC CTP$DFT_ACTION_LIST_DUAL_STATE
*COPYC CTP$DFT_RETURN_TASK_ERROR
 IAPP     BSS    0           NOT USED ON 835
          TASK   (RRE)

 DDCM     BSS    0           CLEAR CM ERROR
          TASK   (CCE)

 DDCE     BSS    0           CLEAR 835 PROCESSOR ERRORS
          TASK   (CLE,SPR)
          QUAL   *
          QUAL   *
          QUAL   ABC
*COPY CTP$DFT_RETURN_ERROR_CODE
          QUAL   *
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (SAVE PP REGISTERS IN CENTRAL MEMORY)
*COPYC CTP$DFT_SAVE_PP_REGISTERS
*COPY  CTP$DFT_DUMP_PP_REGISTERS
*COPY  DSI$DUMP_LOAD_IDLE_PP
          OVERLAY (DFT ERROR CONTROL OVERLAY)
*COPYC CTP$DFT_ERROR_CONTROL

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (LOG TOP OF HOUR COUNTERS)

*COPYC CTP$DFT_LOG_COUNTERS
 RMC      SPACE  4,10
**        RMC - RESET MODEL DEPENDENT COUNTERS.
*


          ROUTINE RMC        ENTRY/EXIT
          LJM    RMCX

 RMCF     CON    0
*COPY     CTP$DFT_NO_RESET_PIT
*COPY     CTP$DFT_NO_TEST_DLD_PATH

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (ENVIRONMENT/SHORT WARNING PROCESSORS)

**        THIS OVERLAY HAS A STUBBED REFERENCE TO CHECK IF THE CONSOLE IS ALIVE.
*         ON CYBER 835 THIS MECHANISM IS NOT USED. THE STUB REPORTS THE CONSOLE IS ALIVE.

*COPYC CTP$DFT_ENVIRONMENT_RTNS
*COPY  CTP$DFT_FIND_WARNING_IN_NRSB
 CCA      SUBR
          LDN    1
          UJN    CCAX        REPORT CONSOLE ALIVE ON NON S0 MACH.
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (ANALYSE PROCESSOR ERRORS)
 APE      SPACE  4,10
**        APE - ANALYSE PROCESSOR ERRORS.
*
*         CALLS  BRL, CLR, PAC, SCS, *CFF*, *LOG*, *RMR*, *STP*, *SWP*.


          ROUTINE APE

          LDN    0
          STM    NERR        SET NO ERROR FLAG FALSE

*         IT IS NECESSARY TO SAVE THE PREHALT STATUS SUMMARY BECAUSE
*         HALTING THE PROCESSOR WILL SET THIS BIT.

          LDM    SUMS        SUMMARY STATUS
          STM    OLSS        SAVE PRE HALT PROCESSOR SUMMARY STATUS
          SHN    21-SSSW     SHORT WARNING
          PJN    APE0        IF NO SHORT WARNING
          CALL   SWP         CALL SHORT WARNING PROCESSOR
          LJM    APEX        RETURN

 APE0     RJM    CTE         CHECK IF THRESHOLD EXCEEDED
          NJP    APEX        IF EXCEEDED IGNORE ERROR
          CALL   CFF         CHECK FOR FREEZE
          LDM    RTP2
          ZJN    APE0.5      IF NOT TO IGNORE ERROR
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST
          UJP    APEX
 APE0.5   LDN    0
          RJM    SCS         SAVE PRE-HALT CONTROL STORE ADDRESS
          CALL   STP         CALL STOP PROCESSOR
          LDM    CPUO
          STM    CPUH        HALTED CPU ORDINAL
          LDN    1
          RJM    SCS         SAVE AFTER HALT CONTROL STORE ADDRESS

*         DISABLE *PFS* AND BLOCK EXCHANGE REQUEST BITS SET IN *DEC*.

          LDN    BC
          RJM    CLR
          LDM    OLSS
          SHN    21-SSPH     PROCESSOR HALT IN SUMMARY STATUS
          PJP    APE5        IF PROCESSOR NOT HALTED
          LDML   CP0CC       CPU 0 CONNECT CODE
          STDL   EC
          LDML   CSAR
          STDL   RN
          READMR RDATA
          RJM    PAC         PACK REGISTER TO *MRVAL*
          LDN    1
          STD    T1
 APE1     LDML   MRVAL,T1
          LMML   APEA,T1
          NJN    APE3        IF CLASS I HALT
          AOD    T1
          LPN    4
          ZJN    APE1        IF MORE TO CHECK

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PROCESSOR HALT CLASS II.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).

          SETDAC DDDC
          SETDAN (EPUN,DASWH)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          UJN    APE4


*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PROCESSOR HALT CLASS I.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).

 APE3     SETDAC DDDC
          SETDAN (EPUN,DAPH)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
 APE4     LDM    CP0U        GET UNCORR REGISTER LIST FOR CPU0
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LJM    APE14       CONTINUE PROCESSING

 APE5     LDM    SUMS        SUMMARY STATUS
          SHN    21-SSUE     UNCORRECTED ERROR
          PJP    APE8        IF NOT UNCORRECTED ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED PROCESSOR ERROR.
*                                  = NO OS ACTION (VERSION 4).

          SETDAN (EPUN,DAUPE)
          SETFLG (BC.FL)
          SETOSA OSUPE,OSNA
          LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE6
          LDM    CP0U        GET UNCORR REGISTER LIST FOR CPU0
          UJN    APE7        CONTINUE

 APE6     LDM    CP1U        GET UNCORR REGISTER LIST FOR CPU1
 APE7     RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LJM    APE14       CONTINUE PROCESSING

 APE8     LDM    SUMS        SUMMARY STATUS
          SHN    21-SSCE     CORRECTED ERROR
          PJP    APE11       IF NOT CORRECTED ERROR
          LDM    OLSS        GET SAVED STATUS SUMMARY
          SHN    21-SSPH
          MJP    APE11       IF PROCESSOR HALT

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = CORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = CORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).

          SETDAN (EPCO,DACPE)
          SETFLG (BC.FL)
          LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE9
          LDM    CP0C        GET CORR REGISTER LIST FOR CPU0
          UJN    APE10       CONTINUE

 APE9     LDM    CP1C        GET CORR REGISTER LIST FOR CPU1
 APE10    RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LJM    APE14       CONTINUE PROCESSING


*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED PROCESSOR ERROR.
*                                  = NO OS ACTION (VERSION 4).

 APE11    SETDAN (EPUN,DAUPE)
          SETFLG (BC.FL)
          SETOSA OSUPE,OSNA
          LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE12       IF CPU1
          LDM    CP0U        GET UNCORR REGISTER LIST FOR CPU0
          UJN    APE13       CONTINUE

 APE12    LDM    CP1U        GET UNCORR REGISTER LIST FOR CPU1
 APE13    RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS

 APE14    LDM    DFTA
          LMC    DDDC
          ZJN    APE15       IF DISABLE CPU
          SETDAC (DDCE)

 APE15    CALL   LOG
          LJM    APEX        RETURN

*         THE FOLLOWING TABLE DEFINES THE MICROCODE ADDRESSES FOR
*         A CPU HALTED BECAUSE OF A CLASS II(UCR/MCR) CONDITION.

 APEA     CON    0
          CON    0#1B6
          CON    0#1B5
          CON    0#1B5

*COPY     CTP$DFT_SAVE_CONTROL_STORE
*COPY CTP$DFT_CHECK_CPU_THRESHOLD

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (ANALYZE IOU ERRORS
          QUAL
*COPYC CTP$DFT_ANALYZE_IOU_ERRORS
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (ANALYSE MEMORY ERRORS)
 AME      SPACE  4,10
**        AME - PROCESS MEMORY ERRORS.
*
*         CALLS  CLR, GSC, FMB, *CFF*, *LOG*, *SME*.


          ROUTINE AME

          LDN    0
          STM    RLST        CORRECTED ERROR FLAG
          STM    NERR        SET NO ERROR FLAG FLAG
          STML   SBER
          STML   SBER+1
          STML   SYCD
          LDN    BC
          RJM    CLR         ZERO SCRATCH BUFFER
          LDM    SUMS        SUMMARY STATUS
          SHN    21-SSUE
          PJP    AME1        IF NOT UNCORRECTED
          READMR RDATA,CMCC,MUL2
          LDML   RDATA
          LMC    0#A0        CANCEL OUT VALID AND PARTIAL WRITE PARITY ERROR
          NJP    AME0.1      IF NOT PARTIAL WRITE PARITY ERROR


*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PARTIAL WRITE PARITY ERROR
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).
*         DFT ANALYSIS - OS ACTION = MULTIPLE ODD BIT ERROR.
*                                  = SYSTEM STEP. (VERSION 4)

          SETDAC DDCM
          SETDAN (EPUN,DAPWP)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          SETOSA OSUCM,OSSS
          UJP    AME0.2      LOG THIS ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED CM ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED MEMORY ERROR.
*                                  = NO OS ACTION (VERSION 4).

 AME0.1   SETDAC DDCM
          SETDAN (EPUN,DAUME)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          SETOSA OSMOB,OSNA
 AME0.2   LDM    ME0U        UNCORRECTED MEMORY REGISTER LIST
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          CALL   CFF         CHECK FOR FREEZE
          LDM    RTP2
          ZJN    AME0.3      IF NOT TO IGNORE ERROR
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJP    AMEX

 AME0.3   CALL   LOG
 AME0     LJM    AMEX        RETURN

 AME1     LDM    SUMS
          SHN    21-SSCE
          PJN    AME0        IF NOT A CORRECTED ERROR
          LDN    1
          STM    RLST        SET CORRECTED ERROR LIST FLAG

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = CORRECTED CM ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = CORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).

          SETDAC DDCM
          SETDAN (EPCO,DACME)
          SETFLG (BC.FL)
          LDM    ME0C        CORRECTED MEMORY ERROR REGISTERS
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          CALL   CFF
          LDM    RTP2
          ZJN    AME3        IF NOT TO IGNORE ERRORS
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJP    AMEX

*         PROCESS CYBER 835 MEMORY ERRORS.

 AME3     RJM    GSC         GET SYNDROME CODE
          LDDL   W2
          SHN    -14D
          STML   SBER+1      LOWER ADDRESS BITS 32 - 33
          LDDL   W1
          LPC    0#3FFF
          SHN    2
          RAML   SBER+1      BITS 18 - 31 OF ADDRESS
          LDDL   W1
          SHN    -14D
          STML   SBER        BITS 16 - 17 OF ADDRESS
          LDDL   W0
          LPN    7           BITS 13 - 15  OF ADDRESS
          SHN    2
          RAML   SBER
          CALL   SME         SERVICE MEMORY ERROR
          LJM    AMEX        RETURN
 GSC      SPACE  4,10
**        GSC - GET SYNDROME CODE.
*
*         ENTRY  (W0 - W3) = PROPER *CEL* REGISTER.
*
*         EXIT   (SYCD) = SYNDROME CODE.
*
*         USES   W0 - W3, *SYCD*.


 GSC      SUBR               ENTRY/EXIT
          LDN    0
          STM    SYCD

*         PROCESS CYBER 835 SYNDROME CODE.

 GSC2     LDC    MCEL        READ CORRECTED ERROR LOG REGISTER
          RJM    FMB
          CRDL   W0
          LDDL   W0
          SHN    21-17
          PJP    AMEX        IF VALID BIT NOT SET
          LDDL   W2
          LPN    77          BITS 0 - 5
          SHN    2
          STML   SYCD        SAVE WHOLE SYNDROME
          LDDL   W3
          SHN    -14D        BITS 6 - 7 OF SYNDROME
          RAML   SYCD
          LJM    GSCX        RETURN
*COPY CTP$DFT_SERVICE_MEMORY_ERROR
*COPY CTP$DFT_REWRITE_CM_ERROR
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (LOG ERRORS TO BUFFER CONTROL WORDS)

**        ON CYBER 990 THERE IS SPECIAL HANDLING OF COMPARING MULTIPLE
*         RETRY ERRORS.

*COPYC CTP$DFT_LOG_ERROR
*COPY CTP$DFT_FIND_CONTROL_WORD
*COPY CTP$DFT_INCREMENT_ERROR_COUNT
*COPY CTP$DFT_LOG_ERROR_CHECK_MATCH
*COPYC CTP$DFT_LOG_ERROR_NON_990
*COPYC CTP$DFT_LOG_ERROR_NO_CONSOLE
*COPY CTP$DFT_ZERO_SUPPORTIVE_STATUS
*COPY  CTC$DFT_ELEMENT_CONVERSIONS
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (GENERATE FAULT SYMPTOM CODE)

**        CYBER 835 FAULT SYMPTOM CODES.

*COPYC CTP$DFT_GENERATE_FAULT_SYMPTOM
*COPY     CTP$DFT_GENERATE_NO_I4C_CODES
          ROUTINE I4S
          LJM    I4SX        RETURN

          ROUTINE I4A
          LJM    I4AX        RETURN

          ROUTINE I4I
          LJM    I4IX

          QUAL   *

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (READ MAINTENANCE REGISTERS)
          QUAL   *           SO THAT OTHER OVERLAYS MAY ACCESS
 S2PC     SPACE  4,10
**        CYBER 835 PROCESSOR CORRECTED ERROR REGISTER LIST.


 S2PC     REGLST (10,00,12,30,90,92)
 S2PU     SPACE  4,10
**        CYBER 835 PROCESSOR UNCORRECTED ERROR REGISTER LIST.


 S2PU     REGLST (10,00,12,30,80,81)

 SXMA     SPACE  4,10
**        CYBER 835 MEMORY REGISTER LIST FOR ALL MEMORY ERRORS.


 SXMA     REGLST (10,00,12,20,A0,A4,A8,21)
 SXIU     SPACE  4,10
**        I1/I1CR CORRECTED AND UNCORRECTED IOU ERROR LIST.


 SXIU     REGLST (10,00,12,30,40,80,81,A0,18,21)
*COPYC CTP$DFT_READ_MAINTENANCE_REGS
 ZSS      SPACE  4,10
**        ZSS - ZERO SUPPORTIVE STATUS.
*
*         NOTE   THIS ROUTINE IS INOPERATIVE ON A CYBER 180-835.


 ZSS      SUBR               ENTRY/EXIT
          UJN    ZSSX        RETURN
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (PROCESSOR PRIMITIVES)

*COPY CTP$DFT_PROCESSOR_PRIMITIVES

 STRBTS   SPACE  4,10
**        STRBTS - STORE BITS IN *DEC*.


          ROUTINE STRBTS


*         PROCESS CYBER 835.

 SETBTP2  LDM    RDATA+4     SET PRESERVE/DISABLE PP EXCHANGES
          LPC    -0#80
          LMC    0#80        PRESERVE/DISABLE PP EXCHANGES
          STM    RDATA+4
          LDM    RDATA+5     DISABLE *PFS*
          SCN    2
          LMN    2
          STM    RDATA+5
          LJM    STRBTSX     RETURN
 CLRBTS   SPACE  4,10
**        CLRBTS - RESTORE MODEL-DEPENDENT BITS IN *DEC*.
*
*         MACROS READMR, WRITMR.


 CLRBTS   SUBR               ENTRY/EXIT
          READMR RDATA,HBUF+CPRPC,DEMR  READ *DEC* REGISTER


*         PROCESS CYBER 835.

 CLRBTP2  LDM    RDATA+4     RESTORE BER SETTING
          LPC    -0#80
          STM    RDATA+4
          LDM    RDATA+5     RESTORE *PFS* SETTING
          SCN    2
          STM    RDATA+5

          WRITMR RDATA,HBUF+CPRPC  REWRITE *DEC* REGISTER
          LJM    CLRBTSX     RETURN
*COPY CTP$DFT_MANAGE_MEMORY_PORT

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (MASSAGE CPU REGISTERS)
*COPY CTP$DFT_MASSAGE_CPU_REGISTERS

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (CLEAR ERRORS)
 CLE      SPACE  4,10
**        CLE - CLEAR ERRORS.
*
*         EXIT   ALL REGISTERS NECESSARY WILL BE CLEARED OF ERRORS.


          ROUTINE CLE

          LDM    HBUF+HDRPC
          STD    EC
          FUNCMR ,MRCE       CLEAR ERRORS FROM *PFS* REGISTERS
          LJM    CLEX        RETURN

 CCE      SPACE  4,10
**        CCE - CLEAR CM ERRORS.
*
*         CALLS  FMB, UPR.


          ROUTINE CCE


*         PROCESS 835 MAINFRAMES.

 CCE2     LDM    RLST
          NJP    CCE4.5      IF CORRECTED ERROR

*         CLEAR UNCORRECTED ERROR LOG 1 AND 2.

          LDC    MUL1
          STD    RN
          RJM    FMB         GET MAINTENANCE BUFFER POINTER FOR REGISTER
          CRML   MRVAL,ON
          RJM    UPR         UNPACK TO (RDATA)
          LDM    RDATA
          SHN    21-7
          PJN    CCE4        IF VALID NOT SET
          LDM    RDATA
          LPN    0#3F        SAVE ALL BUT VALID, UNLOGGED BITS
          STM    RDATA
          WRITMR RDATA,HBUF+HDRPC
 CCE4     LDC    MUL2
          STD    RN          SET UP *UEL2* REGISTER
          RJM    FMB
          CRML   MRVAL,ON
          RJM    UPR
          LDM    RDATA
          SHN    21-7
          PJN    CCE4.1      IF VALID NOT SET
          LDM    RDATA
          LPN    0#3F        SAVE ALL BUT VALID, UNLOGGED BITS
          STM    RDATA
          WRITMR RDATA,HBUF+HDRPC
 CCE4.1   LJM    CCEX        RETURN

 CCE4.5   LDC    MCEL
          STD    RN          CORRECTED MEMORY ERROR REGISTER
          RJM    FMB
          CRML   MRVAL,ON
          RJM    UPR
          LDM    RDATA
          SHN    21-7
          PJN    CCE4.1      IF VALID NOT SET
          LDM    RDATA
          LPN    0#3F        SAVE ALL BUT VALID, UNLOGGED
          STM    RDATA
          WRITMR RDATA,HBUF+HDRPC
          LJM    CCEX        RETURN
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (UPDATE C170 MEMORY)
*COPYC CTP$DFT_UPDATE_170_MEMORY

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_OS_REQUESTS
*COPYC CTP$DFT_OS_REQUESTS_NON_PACKETS

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS - 2)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_REQUEST_PROCESSOR_2

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (PP REQUEST PROCESSOR)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_PP_UTILITY_REQUESTS
*COPY  CTP$DFT_DUMP_PP_REGISTERS
*COPY  DSI$DUMP_LOAD_IDLE_PP

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT ERROR LOGGING ROUTINES)
*COPY     CTP$DFT_PROCESS_DISK_ERROR
*COPY CTP$DFT_RETURN_ERROR_CODE
          OVERFLOW R2ORG
          OVERLAY  (RESTART SCI PP)
 QUAL$    EQU    0
*COPYC CTP$DFT_RESTART_SCI
*COPY DSI$DUMP_LOAD_IDLE_PP
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT RUN TIME ERROR HANDLING)
*COPYC CTP$DFT_RUN_TIME_ERROR_HANDLER
*COPY CTP$DFT_RETURN_ERROR_CODE
*copy     ctp$construct_message_in_eicb

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          END
/EOR
