          IDENT  DFT5,70B
          CIPPU  J
          MEMSEL 16
          BASE   MIXED
          LIST   X
          TITLE  CTM$DFT 960 CLASS (DFT5).
          COMMENT *SMD* LVL=15
          COMMENT COPYRIGHT CONTROL DATA SYSTEMS INC. 1992
 DFT      SPACE  4,10
***       DFT - DEDICATED FAULT TOLERANCE.
*         G. J. FALCONER.    85/08/05. (DFT V1.0)
*         G. J. FALCONER.    86/02/27. (DFT V2.0)
*         C. L. WILSON       87/11/13. (PIP3 OVERLAY ENHANCEMENTS)
 DFT      SPACE  4,10
***       DFT PERFORMS:
*
*         1) CAPTURING THE CONTENT OF MAINFRAME MAINTENANCE REGISTERS
*         FOR ERROR LOGGING, AND CLEARING HARDWARE ELEMENT ERRORS.
*
*         3) THE ACTUAL SEQUENCE OF STEPS TO DEADSTART THE SYSTEM FROM
*         C170 STATE OPERATION TO DUAL-STATE OPERATION OR TO RETURN IT TO
*         STANDALONE C170 OPERATION.  THIS IS PERFORMED UPON THE REQUEST
*         OF THE PP BOOT (*VPB* STATE OF *SCI*).
*
*         4) PROVIDING EXTERNALIZATIONS OF *2AP* FUNCTIONS TO NOS/VE.
 CONTROL  SPACE  4,10
**        ASSEMBLY PARAMETERS.

 PPTYPE   EQU    0           TURN ON TRACKING OF UPPER/LOWER PP
 MCH$     EQU    0           DEFINE *MCH* ROUTINE IN *DSI$DUMP LOAD IDLE*
 HCM$     EQU    0           FLAG IF CPU SHOULD BE HALTED BEFORE MEMORY REGISTERS WRITTEN
 PRGM     SET    2           SET *OVERLAY* MACRO TO *DFT* NAMES
*STEP$    SET    0           ASSEMBLE *STEP* CODE IF SYMBOL DEFINED

          LIST   X
*COPY     CTP$DFT_RELEASE_HISTORY
*COPY     CTH$DEDICATED_FAULT_TOLERANCE
          LIST   *
 COMMON   SPACE  4,10
**        COMMON DECKS.


*COPYC DSI$PP_MACROS
*COPYC DSI$MAINTENANCE_REGISTER_MACROS
*COPYC CTI$COMPASS_OS_LEVELS
*COPYC CTC$DFT_MACROS
*COPYC CTP$DFT_SPECIAL_MAC_ACCESS
*COPYC CTC$DFT_DIRECT_CELLS

          LIST   X
*COPYC CTI$CONSOLE_PACKET_DEFINITIONS
*COPYC CTI$DFT_ANALYSIS_CODES
*COPY DSC$PP_MR_AND_TPM_CONSTANTS
*COPY CTC$DFT_CONSTANTS

*         EQUATES FOR TYPE CODES - 960

 TC.IFD   EQU    0#6         INSTR FETCH TYPE CODE
 TC.REF   EQU    0#3         REFROM TYPE CODE

*         EQU'S FOR BYTE OFFSETS IN MRB AFTER READ TO CM (960)

 OCSM     EQU    CM+0
 OIFD     EQU    CM+2
 OACU     EQU    CM+2
 OBDPM    EQU    CM+0
 OREF     EQU    CM+2

*         CONTROL MEMORY ADDRESS EQUATES  - 960

 MA47     EQU    0#47        MICRAND ADDRESS 47
 MA49     EQU    0#49        MICRAND ADDRESS 49
 MA61     EQU    0#61        MICRAND ADDRESS 61
 MA64     EQU    0#64        MICRAND ADDRESS 64
 MA67     EQU    0#67        MICRAND ADDRESS 67
 MA6A     EQU    0#6A        MICRAND ADDRESS 6A
 MA381    EQU    0#381       MICRAND ADDRESS 381
 M367     EQU    0#1300      MASK
 M1905    EQU    0#1F00
 M4101    EQU    0#0040
 M3401    EQU    0#0020
 MSSM     EQU    0#0020
 DEC42    EQU    0#0020      DEC REG MASK FOR BIT 42
 RF.FWA   EQU    0#00        REGISTER FILE FWA
 IFD.FWA  EQU    0#00        INSTR FETCH FWA
 REF.FWA  EQU    0#00        REFROM FWA
 ACU.FWA  EQU    0#40        ACU FWA
 IDU.CSA  EQU    0#00        CONTROL STORE FWA
 BDP.FWA  EQU    0#00        BDP FWA

*         EQUATES FOR MDB LOGGING - TYPE CODES

 SH.CMPE  EQU    1           CONTROL MEMORY PARITY ERROR
 SH.JEP   EQU    4           JOB EXCHANGE PACKAGE
 SH.EW    EQU    5           EXECUTING WORDS AROUND P
 SH.RI    EQU    7           RETRY INFORMATION
 SH.SR    EQU    8D          SOFT REGISTERS
 SH.RF    EQU    9D          REGISTER FILE
 SH.EL    EQU    10D         ERROR DURING LOGGING

*         EQUATES FOR MDB LOGGING - LENGTH

 LOD.CMPE EQU    11D         CONTROL MEMORY PARITY ERROR
 LOD.JEP  EQU    53D         JOB EXCHANGE PACKAGE
 LOD.EW   EQU    15D         EXECUTING WORDS AROUND P
 LOD.RI   EQU    3           RETRY INFORMATION
 LOD.SR   EQU    28D         SOFT REGISTERS
 LOD.RF   EQU    65D         REGISTER FILE
 RFLOG    EQU    LOD.RF-1    REGISTER FILE LOG LENGTH
 LOD.EL   EQU    11D         ERROR DURING LOGGING

*COPY CTC$DFT_ACTION_OVERFLOW
*COPY DSA$HARDWARE_TABLE_DEFINITIONS
*COPY DSA$VE_REQUESTS_TO_DFT
          LIST   *
*COPY DSI$PP_INSTRUCTION_MNEMONICS
          LIST   X
*COPY CTC$EI_CONTROL_BLOCK
          LIST   *

**        START DEFINITION OF THE MAIN LOOP OF DFT.
*
*         THE CYBER 960 WILL REQUIRE PACKET CODE, EICB UPDATE, AND
*         RELOCATION ROUTINES.

*COPYC CTP$DFT_MAIN_LOOP
 CRN      SPACE  4,10
**        CRN - CHECK RELOCATION NECESSARY
*
*         STUB ON 960


 CRN      SUBR               ENTRY/EXIT
          UJN    CRNX
*COPYC CTP$DFT_MAIN_LOOP_PACKETS
*COPYC CTP$DFT_MAIN_LOOP_UPDATE_TIME
*COPYC CTP$DFT_MAIN_LOOP_DUAL_STATE

**        END OF DFT MAIN LOOP DEFINITIONS

*COPYC CTC$DFT_GLOBAL_DATA
*COPYC CTC$DFT_GLOBAL_DATA_NON_S0
 FALT     CON    0           HOLDS EPM FAULT FLAGS
 CMIN     CON    0           NUMBER OF CM WORDS IN EPM PACKET
 CMTL     CON    0           TOTAL CM WORDS FOR EPM PACKETS
 HALT     CON    0           HALT ON ERROR FLAG
 RCTR     CON    0           RETRY CNTR SAVE AREA
 RADR     BSSZ   3           R-REG OFFSET FOR RETRY
 PSAVE    BSSZ   4           P-REG SAVE AREA FOR RETRY
 MARA     CON    0           MICRAND REGISTER SAVE AREA
 FAIL     CON    0           FAILING ADDRESS
 SHWF     CON    0           SUB-HEADER WORD FLAG
 FSAC     CON    0           FAULT SYMTOM ANALYSIS CODE
 EPBA     BSSZ   2           EXCHANGE PACKAGE BYTE ADDRESS
 MACF     CON    0           MAC HANG ERROR FLAG
*COPYC CTC$DFT_MDB_LOGGING_CONSTANTS
*COPYC CTP$DFT_RESIDENT_COMMON
*COPYC CTP$DFT_RESIDENT_ECM_NON_S0
*copy dsi$find_cip_module
*copy dsi$get_hardware_element
*COPYC CTP$MR_PROTOCOL_PREPROCESS
*COPYC CTP$MR_RETRY_OPERATION_FOR_DFT
*COPYC CTP$MR_PROTOCOL_PROCESS
*COPYC CTP$MR_PROTOCOL_POSTPROCESS

*copy DSI$PP_UTILITY_SUBROUTINES
 STP      SPACE  4,10
**        STP - STOP PROCESSOR.
*
*         ENTRY  (A)= PORT CODE OF PROCESSOR.
*
*         CALLS  RMR, *ERRH*.


 STP      SUBR               ENTRY/EXIT
          STML   STPA        CHECK PORT CODE
          ZJN    STPX        IF PORT CODE ZERO RETURN
          LDN    SSMR
          STD    RN
          LDML   STPA
          RJM    RMR         READ SUMMARY STATUS
          LPN    0#8
          NJN    STP2        IF PROCESSOR IS HALTED
          FUNCMR ,MRHP       STOP PROCESSOR
          LDN    0
          STML   ACTB1+2
          STML   TFLG
 STP0     RJM    TIM
          LDM    TFLG
          ZJN    STP0        IF 100 MS WAIT NOT DONE
 STP2     LDML   STPA
          RJM    RMR         READ SUMMARY STATUS
          LPN    0#8
          ZJN    STP2        IF NOT HALTED
          LJM    STPX        RETURN

 STPA     CON    0

          USE    PRESET
          QUAL   PRESET
*COPYC CTP$DFT_PRESET
*COPYC CTP$DFT_PRESET_DUAL_I4
*COPY CTP$DFT_RETURN_ERROR_CODE
 SPO      SPACE  4,10
**        SPO - SETUP MEMORY PORT OFFSET.
*
*         EXIT   PO IS SET TO THE MODEL DEPENDENT PORT OFFSET.
*
*         USES   PO.


 SPO      SUBR               ENTRY/EXIT
          LDN    4           SETUP MEMORY PORT OFFSET
          STD    PO
          UJN    SPOX        RETURN
          USE    *
          QUAL   *
          OVERLAY  (RESIDENT PART II),R2ORG
          QUAL   *
*COPYC CTP$DFT_RESIDENT_II_COMMON
*COPYC CTP$DFT_NON_930_RESIDENT_II
*COPYC DSI$PACK_UNPACK_REGISTERS
*COPYC DSI$VALIDATE_PP_BOUNDS
*COPYC CTP$DFT_RESIDENT_II_NON_990
 HAC      SPACE  4,10
**        HAC - HALT ALL CPUS.
*
*         CALLS  STP.
*
*         NOTE   THIS IS USED FOR HALTING CPUS PRIOR TO WRITING MEMORY REGISTERS.


 HAC      SUBR               ENTRY/EXIT
          LDN    71B
          CRDL   T0
          LDDL   T0
          SHN    7           BIT 5 TELLS IF NOS IN BOTH HEADS
          MJN    HACX        IF TWO HEADED NOS IGNORE HALTS
          LDML   CP0CC       CPU0 CONNECT CODE
          RJM    STP         STOP PROCESSOR
          LDML   CP1CC       CPU1 CONNECT CODE
          RJM    STP         STOP PROCESSOR
          UJN    HACX        RETURN
 SAC      SPACE  4,10
**        SAC - START ALL CPUS.
*
*         ENTRY  (A) = 0 START ALL CPUS.
*                (A) <> 0 DONT START CPU IDENTIFIED IN (A) BY PORT CODE.
*
*         NOTE   THIS IS USED FOR STARTING CPUS AFTER WRITING MEMORY REGISTERS


 SAC      SUBR               ENTRY/EXIT
          STML   SACA        SAVE POTENTIAL PROCESSOR NOT TO START
          LDN    71B
          CRDL   T0
          LDDL   T0
          SHN    7           BIT 5 TELLS IF NOS IN BOTH HEADS
          MJN    SACX        IF TWO HEADED NOS IGNORE START
          LDML   CP0CC
          ZJN    SAC1        IF NOT DEFINED
          SBML   SACA
          ZJN    SAC1        IF NOT TO BE STARTED
          LDN    0           CPU 0
          RJM    CPD         CHECK IF MEMORY PORT DISABLED
          NJN    SAC1        IF PORT IS DISABLED
          FUNCMR CP0CC,MRSP  CPU0 CONNECT CODE
 SAC1     LDML   CP1CC
          ZJP    SACX        IF NOT DEFINED
          SBML   SACA
          ZJP    SACX        IF NOT TO BE STARTED
          LDN    1           CPU 1
          RJM    CPD         CHECK IF MEMORY PORT IS DISABLED
          NJP    SACX        IF PORT IS DISABLED
          FUNCMR CP1CC,MRSP  CPU1 CONNECT CODE
          LJM    SACX        RETURN

 SACA     CON    0           PORT CODE FOR PROCESSOR TO NOT START
 CPD      SPACE  4,10
**        CPD - CHECK IF MEMORY PORT IS DISABLED.
*
*         ENTRY  (A) = 0 CHECK CPU 0 MEMORY PORT.
*                (A) = 1 CHECK CPU 1 MEMORY PORT.
*
*         EXIT   (A) = 0 PORT IS NOT DISABLED.
*                (A) <> 0 PORT IS DISABLED.
*
*         CALLS  RMR.


 CPD      SUBR               ENTRY/EXIT
          STM    CPDA        SAVE CPU SELECTOR
          LDN    ECMR
          STDL   RN
          LDML   CMCC
          RJM    RMR         READ MAINTENANCE REGISTER
          LDM    CPDA
          NJN    CPD2        IF CPU 1
          LDC    SHNI+4+3    GENERATE SHIFT INSTRUCTION
          SBM    CMP0
 CPD1     STM    CPDB
          LDN    1
 CPDB     SHN    4+**
          STM    CPDC
          LDM    RDATA,PO
          LPC    **          EXTRACT CPU PORT DISABLE BIT
 CPDC     EQU    *-1
          UJN    CPDX

 CPD2     LDC    SHNI+4+3
          SBM    CMP1
          UJN    CPD1

 CPDA     CON    0
**        END OF RESIDENT II COMMON AREA

          ERRNG  10000-*     RESIDENT II OVERFLOWS PP MEMORY
*COPY  CTP$DFT_PRESET_DUAL_I4_OVL
*COPYC CTP$DFT_PRESET_BUILD_STRUCTURE
          OVERLAY (PRESET STANDARD OVERLAY)
*COPYC CTP$DFT_PRESET_STANDARD_OVL
*COPY CTP$DFT_RETURN_ERROR_CODE
 SSO      SPACE  4,10
**        SSO - SETUP SPECIAL OVERLAY
*
*         EXIT   OVERLAY TO HANDLE BIT 57 ERRORS ON A MODEL 43(16) OR 44(16)
*                IOU.  LOADED AT LOCATION 10000(8) OF THE PP.

 SSO      SUBR               ENTRY
          LDM    IOUM
          LMC    0#43
          ZJN    SSO1        IF MODEL 43(16)
          LMC    0#44&0#43
          ZJN    SSO1        IF MODEL 44(16)
          UJN    SSOX        RETURN

 SSO1     LDC    SCO_O
          RJM    LOV         LOAD SPECIAL OVERLAY
          UJN    SSOX        RETURN

 SMV      SPACE  4,10
**        SMV - SETUP MODEL DEPENDENT VALUES.
*
*         *SMV* WILL SET UP REGISTER LIST ADDRESSES ON A MODEL DEPENDENT BASIS, AND
*         WILL INITIALIZE ALL MODEL DEPENDENT GLOBAL DATA.


 SMV      SUBR               ENTRY/EXIT
          LDC    DGCP        SET THE TASK LIST ADDRESS FOR DEGRADING A CPU
          STM    DTLA
          LDN    0           CLEAR HALT ON ERROR
          STM    HALT
          LDC    SXIU        UNCORRECTED REG LIST FOR IOU
          STM    IO0U        SAVE LIST ADDRESS
          STM    IO0C
          LDML   IOUM
          LMC    0#43
          ZJP    SMV10       IF MODEL 43
          LMN    0#44&0#43
          ZJN    SMV10       IF MODEL 44
          LDML   IOUM
          LMC    0#42
          ZJN    SMV10       IF MODEL 42
          READMR RDATA,I0CC,OIMR  I4 PROCESSOR
          LDM    RDATA+7
          SHN    10D         CHECK BIT 56 FOR CIO PP PRESENT
          PJN    SMV10       IF NO CIO PPS PRESENT
          LDC    I4IU
          STM    IO0U        UNCORRECTED REGISTER LIST
          LDC    I4IC
          STM    IO0C        CORRECTED REGISTER LIST
 SMV10    LDC    MA960       COMPLETE REGISTER LIST FOR MEMORY ERRORS
          STM    ME0U        UNCORRECTED MEMORY ERROR LIST
          STM    ME0C        CORRECTED MEMORY ERROR LIST
          LDC    PA960
          STM    CP0C        CORR/UNCORR REGISTER LIST
          STM    CP0U
          LDN    PROCID
          RJM    FHE         FIND HARDWARE ELEMENT
          MJP    PRS140      IF CANT FIND CPU0
          LDM    HBUF+CPRPORT
          STM    CMP0        SAVE CPU0 MEMORY PORT
          LDC    PROCID1
          RJM    FHE         FIND HARDWARE ELEMENT
          MJP    SMVX        IF NOT DEFINED
          LDM    HBUF+CPRPORT
          STM    CMP1        SAVE CPU1 MEMORY PORT
          LJM    SMVX

*COPY     CTP$DFT_CLEAR_PACKETS_I4
*COPYC CTP$DFT_PRESET_PACKETS
          OVERLAY  (MAIN NON-RESIDENT ROUTINES)

**        START OF THE MAIN NON RESIDENT ROUTINES OVERLAY. ON CYBER 960
*         THIS OVERLAY DEFINES ROUTINES FOR PACKETS, I4,
*         HALT ON ERROR PROCESSING, EICB TIME UPDATE, AND PACKET COMMUNICATION.

*COPYC CTP$DFT_MAIN_NON_RES_RTNS
*COPY CTP$DFT_SET_SS_DUAL_I4
*COPYC CTP$DFT_MAIN_NON_RES_DUAL_I4
*COPYC CTP$DFT_MAIN_NON_RES_EICB_TIME
*COPY CTP$DFT_CHECK_TPM_PKT_RESPONSE
*COPYC CTP$DFT_MANAGE_PACKET_TRAFFIC
 ERR      CALL   ROS         REPORT OS ERROR



 HOE      SPACE  4,10
**        HOE - HALT ON ERROR FOR 960 CLASS MACHINES.
*
*         ENTRY  DEDICATED FLAG IN DFT HEADER DETERMINES ACTION.
*
*         EXIT   *DEC* REGISTER SET/CLEAR FOR HALT ON ERROR.
*                CELL *HE* SET OR CLEARED DEPENDING ON DEDICATED FLAG.
*
*         CALLS  FHE, IDA, SHE, *MHE*.


          ROUTINE HOE

          LDN    HDRP
          RJM    IDA
          CRDL   CM          GET DFT HEADER
          LDDL   CM+DHFLG    GET FLAGS
          SHN    21-DH.FD    DEDICATED FLAG
          PJN    HOE1        IF DEDICATED MODE
          LDM    HALT
          ZJN    HOE0        IF NO HALT ON ERROR AND NON DEDICATED
          LDN    0
          STM    HALT        CLEAR HALT ON ERROR
          UJN    HOE2        CONTINUE

 HOE0     LJM    HOEX        RETURN

 HOE1     LDN    1
          STM    HOEB        MARK DEDICATED MODE
          LDM    HALT
          NJN    HOE0        IF DEDICATED AND HALT ON ERR ALREADY SET
 HOE2     LDN    0
          STM    HOEA        SAVE ELEMENT COUNTER
          LDN    PROCID
 HOE3     RJM    FHE         FIND HARDWARE ELEMENT HBUF HOLDS RESULT
          MJN    HOE5        IF DONE WITH ALL ELEMENTS
          LDM    HBUF+CPUON
          LPN    1
          NJN    HOE4        IF DOWN
          LDM    HBUF+CPRE+EM  GET MODEL
          SHN    -4
          STD    MD
          RJM    SHE         SET HALT ON ERROR
 HOE4     AOM    HOEA        BUMP ELEMENT NUMBER
          SHN    14
          ADN    PROCID      SET UP PARAMETER TO FHE
          UJN    HOE3        LOOP

 HOE5     CALL   MHE         MONITOR HARDWARE ENVIRONMENT
          LJM    HOEX        RETURN

 HOEA     CON    0           ELEMENT COUNTER
 HOEB     CON    0           DEDICATED MODE FLAG
 SHE      SPACE  4,10
**        SHE - SET HALT ON ERROR.
*
*         EXIT   IF CYBER 960 AND DEDICATED, *HALT* = 1 AND
*                *DEC* REGISTER UPDATED.
*         USES   *HALT*.
*
*         MACROS READMR, WRITMR.


 SHE      SUBR               ENTRY/EXIT
          READMR RDATA,HBUF+HDRPC,DEMR
          LDM    RDATA+5
          LPC    -0#10       CLEAR BIT
          STM    RDATA+5
          LDM    HOEB
          ZJN    SHE1        IF NOT DEDICATED
          LDN    1
          STM    HALT        SET HALT ON ERROR
          LDM    RDATA+5
          LMC    0#10        SET IT
          STM    RDATA+5
 SHE1     WRITMR RDATA,HBUF+HDRPC
          LJM    SHEX        RETURN


          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (AUX MAIN NON RESIDENT ROUTINES)
*COPYC CTP$DFT_MAIN_NON_RES_DUAL_STATE
*COPYC CTP$DFT_LOG_PACKET_TIMEOUT
*COPYC CTP$DFT_CPU_HANDSHAKER
          ROUTINE ROS
          LJM    ERR
*COPY CTP$DFT_PREPARE_FOR_CIP_CALL
*COPY CTP$DFT_RETURN_ERROR_CODE
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DO DFT ACTIONS)

*COPYC CTP$DFT_ACTION_LIST
*COPY  CTP$DFT_ACTION_LIST_DUAL_I4
*COPYC CTP$DFT_ACTION_LIST_DUAL_STATE

 DDCE     BSS    0           CLEAR 960 PROCESSOR ERRORS
          TASK   (LOG,CLE,SPR)

 DDCM     BSS    0           CLEAR CM ERROR
          TASK   (CCE)

 DGCP     BSS    0           DEGRADE CPU MEMORY PORT
          TASK   (SCW,DIP)

 ROUE     BSS    0           RETRY UNSUCC/UNCORR ERROR
          TASK   (LMB,RCM,ELB,LOG,SCW,CLE,SPR)

 UENH     BSS    0           UNCORR ERR - NOT HALT ON ERROR
          TASK   (RCM,LOG,SCW,CLE,SPR)

*         THE FOLLOWING ACTION LIST IS USED FOR FATAL
*         SOFTWARE AND HARDWARE ERRORS, FATAL CLOCK
*         ERROR, AND CONTROL STORE ERROR IN MONITOR

 PIFE     BSS    0           960 FATAL SOFTWARE/HARDWARE ERR
          TASK   (LMB,CDB,CCM,PJH,ELB,DID,LOG,SCW,DIP,WM7,IFM)

 UEJM     BSS    0           UNCORR ERROR - JOB MODE
          TASK   (LMB,RCM,CLE,MCP,HEO,LEP,ELB,LOG,SCW,CLE,HEI)

 RIPA     BSS    0           960 RETRY IN PROGRESS ACTION
          TASK   (RCM,ELB,LOG,SCW,CLE,SPR)

 RIPC     BSS    0           RETRY IN PROGRESS CONT.
          TASK   (RCM,CLE,SPR)

 MCHI     BSS    0           CPU MAC HUNG INITIALLY
          TASK   (DID,LOG,DIP,WM7,IFM)

 MCHP     BSS    0           CPU MAC HUNG IN PROGRESS
          TASK   (ELB,DID,LOG,SCW,DIP,WM7,IFM)

*COPYC CTP$DFT_RETURN_TASK_ERROR
          QUAL   *
          QUAL   ABC
*COPY CTP$DFT_RETURN_ERROR_CODE
          QUAL   *

          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DO ADDITIONAL DFT ACTIONS)

**        START OF DFT ACTION LISTS OVERFLOW.  THIS IS AN EXTENSION OF THE COMMON
*         DFT ACTIONS.

          QUAL

*COPYC CTP$DFT_ACTION_LIST_OVERFLOW

          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT SEND PACKETS OVERLAY)
*COPYC CTP$DFT_CHECK_PKTS_FOR_NON_S0
*COPYC CTP$DFT_CHECK_PKT_STATUS_NON_S0
*COPYC CTP$DFT_SEND_PACKET_ALL
*COPY  CTP$DFT_SEND_PACKET_FOR_NON_S0
*COPY  CTP$DFT_CLEAR_PACKETS_I4

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY (SAVE PP REGISTERS IN CENTRAL MEMORY)
*COPYC CTP$DFT_SAVE_PP_REGISTERS
*COPY  CTP$DFT_DUMP_PP_REGISTERS
 QUAL$    EQU    1
*COPY  DSI$DUMP_LOAD_IDLE_PP
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (DFT ERROR CONTROL OVERLAY)


*COPYC CTP$DFT_ERROR_CONTROL

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (LOG TOP OF HOUR COUNTERS)

*COPYC CTP$DFT_LOG_COUNTERS
 RMC      SPACE  4,10
**        RMC - RESET MODEL DEPENDENT COUNTERS.
*                IF VERSION 4 OR GREATER, CHECK FOR MIDNIGHT.
*                IF SO, CLEAR THE LONGTERM INTERLOCK FLAG IN THE
*                MAIN CPU MODEL DEPENDENT BUFFER HEADER WORD.
*
*         USES   RS-RS+2, CM-CM+3
*
*         CALLS  VCK, IIB, SPC, IDA.
*

          ROUTINE RMC        ENTRY/EXIT
          LDN    VER4
          RJM    VCK
          MJP    RMCX        IF VERSION 3 OR LESS
          LDN    DFCM+7
          RJM    IIB
          CRML   RMCA,ON     GET TIME (TOP OF HOUR)
          LDML   RMCA+2
          LPC    0#FF00
          NJP    RMCX        IF NOT MIDNIGHT
          LRD    DP+1
          RJM    SPB         SET PP BOUNDS
          LDN    MDLP        MDB PTR OFFSET
          RJM    IDA
          CRDL   RS          READ MDB PTR
          LRD    RS+1        LOAD INTO R-REGISTER
          LDD    RS
          ADC    RR
          CRDL   RS          READ CPU0 MDB PTR
          LRD    RS+1        LOAD INTO R-REGISTER
          LDD    RS
          ADC    RR
          CRDL   CM          READ MDB HEADER WORD
          LDDL   CM          BITS 0-16
          LPC    0#F0FF      CLEAR BITS 4-7
          STDL   CM          RESTORE
          LDD    RS
          ADC    RR          ACTIVATE R-REGISTER
          CWDL   CM          WRITE TO MDB
          UJP    RMCX        RETURN

 RMCA     BSS    4           TIME STAMP FROM EICB
 RMCF     CON    0
*COPY     CTP$DFT_RESET_PIT
*COPY     CTP$DFT_TEST_DLD_PATH

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (ENVIRONMENT/SHORT WARNING PROCESSORS)

*COPYC CTP$DFT_ENVIRONMENT_RTNS
 CCA      SUBR
          LDN    1
          UJN    CCAX        REPORT CONSOLE ALIVE ON NON S0 MACH.
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (ANALYSE 960 CPU ERRORS)

 APE      SPACE  4,10
**        APE - ANALYSE CYBER 960 PROCESSOR ERRORS.
*
*         CALLS  CFF,SWP,SCS,STP,CLR,RMR,PAC,BRL,GCM,PCM,CCF,CCS,CRS,ARS,AFF,SSE


          ROUTINE APE

          CALL   CFF         CHECK FOR FREEZE
          LDN    0
          STM    NERR        SET NO ERROR FLAG FALSE
          STM    MACF        CLEAR MAC ERROR FLAG

*         IT IS NECESSARY TO SAVE THE PREHALT STATUS SUMMARY BECAUSE
*         HALTING THE PROCESSOR WILL SET THIS BIT.

          LDM    SUMS        SUMMARY STATUS
          STM    OLSS        SAVE PRE HALT PROCESSOR SS
          SHN    21-SSSW     SHORT WARNING
          PJN    APE1        IF NO SHORT WARNING
          CALL   SWP         CALL SHORT WARNING PROCESSOR
          LJM    APEX        RETURN

 APE1     RJM    CTE         CHECK THRESHOLD EXCEEDED
          NJP    APEX        IF THRESHOLD EXCEEDED IGNORE ERROR
 APE2     LDN    0
          RJM    SCS         SAVE PREHALT CONTROL STORE ADDRESS
          CALL   STP         CALL STOP PROCESSOR
 APE3     LDN    1
          RJM    SCS         SAVE AFTER HALT CSA
          LDM    CPUO
          STM    CPUH        HALTED CPU ORDINAL
          LDN    BC
          RJM    CLR
          LDN    PCSA        CONTROL STORE ADDRESS
          STD    RN
          LDM    HBUF+HDRPC
          RJM    RMR         READ CSA
          RJM    PAC         MRVAL = CSA
          LDML   MRVAL+3
          LPC    0#7FF
          STML   MARA        SAVE MAR (MICRAND ADDRESS REGISTER)

*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).

          SETFLG (BC.FV7,BC.FV8,BC.FL)

          LDC    DEMR        DEC REG
          STD    RN
          CALL   RPM         READ REG TO TEST STATE OF MAC
          LDM    CP0C        GET REGISTER LIST FOR CPU
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LDM    MACF        ERROR FLAG
          ZJN    APE3.5      IF NO ERROR
          SETDAC MCHI
          UJP    APEX        EXIT
 APE3.5   LDM    OLSS
          LPN    MSSM        MONITOR MASK
          ZJN    APE4        IF JOB MODE
          LDC    PMPS        EXCH PACKAGE FOR MONITOR
          UJN    APE5

 APE4     LDC    PJPS        EXCH PACKAGE FOR JOB
 APE5     STD    RN
          CALL   RPM         READ MPS OR JPS
          LDM    MACF        ERROR FLAG
          ZJN    APE5.5      IF NO ERROR
          SETDAC MCHI
          UJP    APEX        EXIT
 APE5.5   RJM    PAC         MRVAL = MPS OR JPS
          LDML   MRVAL+3
          SHN    -3          FORM WORD ADDRESS FOR LWA ROUTINE
          STML   EPBA+1
          LDM    MRVAL+2
          LPN    7
          SHN    13D
          RAML   EPBA+1
          LDML   MRVAL+2
          SHN    -3
          STML   EPBA        SAVE ADDRESS

*         GET PSAVE, RCTR, RADR FROM CENTRAL MEMORY BUFFER

          LDN    CMRC        RETRY COUNTER
          RJM    GCM
          LDDL   CM+3
          STML   RCTR        UPDATE RETRY COUNTER
          LDN    CMRA        PREVIOUS R-REGISTER ADDR
          RJM    GCM
          LDDL   CM+1
          STML   RADR        UPDATE FOR ARS ROUTINE
          LDDL   CM+2
          STML   RADR+1
          LDDL   CM+3
          STML   RADR+2
          LDN    CMPRA       PREVIOUS P-REGISTER ADDR
          RJM    GCM
          LDDL   CM
          STML   PSAVE       UPDATE FOR ERROR ANALYSIS
          LDDL   CM+1
          STML   PSAVE+1
          LDDL   CM+2
          STML   PSAVE+2
          LDDL   CM+3
          STML   PSAVE+3
          LDM    OLSS
          SHN    21-SSPH
          MJP    APE6        IF PROC ORIGINALLY HALTED
          LDM    HALT
          ZJP    APE6        IF NOT HALT ON ERROR
          LDM    OLSS
          SHN    21-SSUE
          PJN    APE6        IF NOT UNCORRECTED ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = FATAL UNCORR ERR.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = CPU HALT ERROR.

          SETDAC PIFE
          SETDAN (EPCH,DAFUE)
          LJM    APE23       CONTINUE PROCESSING

 APE6     LDM    OLSS
          SHN    21-SSPH     PROCESSOR HALT IN SUMM STAT
          PJP    APE7        IF PROCESSOR NOT HALTED
          LDM    HALT        GET HALT ON ERROR FLAG
          NJP    APE7        IF HALT ON ERROR SET

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = FATAL PROCESSOR HALT.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = CPU HALT ERROR.

          SETDAC PIFE
          SETDAN (EPCH,DAPH)
          LJM    APE23       CONTINUE PROCESSING

*         CHECK FOR CLOCK ERRORS

 APE7     RJM    CCF         CHECK CLOCK FAULT STATUS
          ZJP    APE8        IF NO CLOCK ERRORS

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = FATAL CLOCK ERROR.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = CPU HALT ERROR.

          SETDAC PIFE        FATAL CLOCK ERROR
          SETDAN (EPCH,DACE)
          UJP    APE23       CONTINUE PROCESSING

*         CHECK FOR FATAL SOFTWARE ERROR

 APE8     LDML   MARA
          LMC    MA49
          NJP    APE9        IF MAR .NE. 49
          SETDAN (EPCH,DASWH)  FATAL SOFTWARE ERROR
          SETDAC PIFE        MONITOR MODE
          UJP    APE23       CONTINUE

 APE9     LDM    OLSS        SUMMARY STATUS
          SHN    21-SSUE
          MJP    APE10       IF UNCORRECTED ERROR
          LDM    OLSS
          SHN    21-SSCE     CORRECTED ERROR
          MJP    APE19       IF CORRECTED ERROR
 APE10    LDML   MARA
          LMC    MA61
          ZJP    APE21       IF MICRAND ADDRESS = 61

*         CHECK FOR UNCORRECTED ERROR - UNSUCCESSFUL RETRY

          LDC    PPRG        P-REGISTER ADDRESS
          STD    RN
          CALL   RPM         READ CURRENT P REGISTER
          LDM    MACF        ERROR FLAG
          ZJN    APE10.5     IF NO ERROR
          SETDAC MCHI
          UJP    APEX        EXIT
 APE10.5  RJM    PAC         PACK DATA INTO MRVAL
          LDN    3
          STDL   T2
 APE11    LDML   MRVAL,T2    CURRENT P
          SBML   PSAVE,T2    PREVIOUS P
          NJP    APE13       IF P .NE. PREVIOUS P
          SODL   T2
          PJP    APE11       IF MORE TO COMPARE
          LDML   RCTR        RETRY COUNTER
          ZJP    APE13       NOT UNSUCCESSFUL RETRY CONDITION
          LDN    0
          STML   RCTR        CLEAR RETRY COUNTER

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNSUCCESSFUL RETRY.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.

          SETDAN (EPUN,DATRE)
          LDML   MARA        MAR
          LMC    MA6A
          ZJP    APE12       IF MAR .EQ. 6A

*         DFT ANALYSIS - DFT ACTION = UNCORRECTED ERROR.

          SETDAC ROUE        SET ACTION LIST
          LJM    APE23       CONTINUE

*         DFT ANALYSIS - DFT ACTION = UNCORR ERR - JOB MODE.

 APE12    SETDAC UEJM        DEFAULT TO JOB MODE
          LDM    OLSS        STATUS SUMMARY
          LPN    MSSM        MONITOR MASK
          ZJP    APE23       IF JOB MODE

*         DFT ANALYSIS - ANALYSIS = UNSUCCESSFUL RETRY.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = FATAL CPU HALT ERROR.

          SETDAN (EPCH,DATRE)
          SETDAC PIFE
          UJP    APE23       CONTINUE

*         UNCORRECTED ERROR

 APE13    SETDAC ROUE        PROCESSOR UNCORRECTED ERROR
          LDML   MARA        MAR
          LMC    MA67
          NJN    APE14
          RJM    CCT         CHECK FOR CPU/CM TIMEOUT
          NJP    APE23       IF TIMEOUT
          SETDAN (EPUN,DAUEV)  EXCHANGE VECTOR
          UJP    APE23       CONTINUE

 APE14    LDML   MARA
          LMC    MA64
          NJN    APE15
          SETDAN (EPUN,DAUTV)  TRAP VECTOR
          UJP    APE23       CONTINUE

 APE15    LDML   MARA
          LMC    MA6A
          NJP    APE17       IF MAR .NE. 6A
          SETDAN (EPUN,DAUHV)  HALT VECTOR (JOB MODE)
          SETDAC UEJM
          LDM    OLSS        STATUS SUMMARY
          LPN    MSSM
          ZJN    APE16       IF JOB MODE
          SETDAN (EPCH,DAPH) PROCESSOR HALT (MONITOR MODE)
          SETDAC PIFE
 APE16    UJP    APE23       CONTINUE

*         CHECK FOR FATAL CONTROL STORE ERROR

 APE17    RJM    CCS         CHECK CONTROL STORE ERRORS
          NJP    APE23       IF ERRORS
          LDM    SUMS
          SHN    21-SSUE     UNCORRECTED ERROR
          MJP    APE18       IF UNCORRECTED ERROR SET

*         CHECK FOR POSSIBLE RESTART CONDITION.

          LDML   MARA
          LMN    5
          ZJP    APE22       IF RESTART IS POSSIBLE

*         PIP3 FORCED UNCORRECTED ERROR

          SETDAN (EPUN,DATFU)  FATAL UNCORRECTED ERROR
          SETDAC (UEJM)
          LDM    OLSS        STATUS SUMMARY
          LPN    MSSM
          ZJN    APE17.5     IF JOB MODE
          SETDAN (EPCH,DATFU)
          SETDAC (PIFE)
 APE17.5  UJP    APE23       CONTINUE

*         DEFAULT TO UNCORRECTED ERROR

 APE18    SETDAC ROUE
          SETDAN (EPUN,DAUPE)
          LDM    HALT
          NJP    APE23       IF HALT ON ERROR SET
          SETDAC UENH        ACTION FOR NON-DEDICATED
          UJP    APE23       CONTINUE

*         CHECK FOR SUCCESSFUL RETRY / CORRECTED ERROR

 APE19    LDML   MARA
          LMC    MA61
          ZJP    APE21       IF AT RETRY VECTOR
          RJM    CRS         CHECK SUCCESSFUL RETRY STATUS
          ZJP    APE20       IF NOT SUCCESSFUL RETRY
          SETDAN (EPCO,DARS)
          SETDAC DDCE
          UJP    APE23       CONTINUE

*         CHECK FOR RETRY IN PROGRESS

 APE20    LDML   MARA        MAR
          LMC    MA61
          NJP    APE22       IF NOT RETRY IN PROGRESS
 APE21    SETDAN (EPRT,DARP)
          SETDAC RIPC        DEFAULT TO CONTINUATION ACTION
          CALL   ARS         ANALYZE RETRY STATUS
          LDM    MACF        MAC ERROR FLAG
          ZJN    APE21.5     IF NO ERROR
          SETDAC MCHI
          UJP    APEX        EXIT
 APE21.5  LDM    RTP2        EXIT FLAG FROM ARS
          NJN    APE23       CONTINUE IF FLAGGED
          SETDAC RIPA        RETRY FIRST TIME
          UJN    APE23       CONTINUE

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = CORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = CORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).

 APE22    SETDAN (EPCO,DACPE)
          SETDAC DDCE

 APE23    CALL   AFF         ANALYZE FIRST FAILURE CAPTURE DATA

*         SAVE PSAVE, RCTR, RADR IN CENTRAL MEMORY BUFFER

          LDN    CM
          RJM    CLR         CLEAR CELLS
          LDML   RCTR        RETRY COUNTER
          STDL   CM+3
          LDN    CMRC
          RJM    PCM         SAVE IN CENTRAL MEMORY BUFFER
          LDML   RADR        R-REGISTER ADDRESS FOR RETRY
          STDL   CM+1
          LDML   RADR+1
          STDL   CM+2
          LDML   RADR+2
          STDL   CM+3
          LDN    CMRA
          RJM    PCM         SAVE R-REGISTER ADDRESS
          LDML   PSAVE       P-REGISTER ADDRESS FROM THIS ERROR
          STDL   CM
          LDML   PSAVE+1
          STDL   CM+1
          LDML   PSAVE+2
          STDL   CM+2
          LDML   PSAVE+3
          STDL   CM+3
          LDN    CMPRA
          RJM    PCM         SAVE P ADDRESS FOR THIS ERROR
          LDM    CPUO
          RJM    SSE         SET SECONDARY ELEMENT IDENTIFIER
          LJM    APEX        RETURN

*COPY     CTP$DFT_SAVE_CONTROL_STORE
*COPY     CTP$DFT_990_960_DEGRADE_CPU
*COPY CTP$DFT_CHECK_CPU_THRESHOLD

          EJECT
**        CCF -  CHECK CLOCK FAULT STATUS.
*                READ CLOCK PFS BITS (PFS 83,87,89 - BITS 16,17,18,
*                AND PFS 81,85 - BITS 16,17,18,19). IF ANY SET,
*                CHANGE DFT ACTION TO STEP SYSTEM.  SET LOG FLAG
*                FOR OS.
*
*         USES   T2, CM - CM+4.
*
*         EXIT   (A) = 0 IF NO ERRORS
*
*         CALLS  FMB.

 CCF      SUBR               ENTRY / EXIT
          LDN    4           TABLE LENGTH
          STDL   T2
 CCF1     LDML   CCFA,T2     GET TABLE ENTRY
          RJM    FMB         GET ADDR TO SCRATCH BUFFER
          CRDL   CM          READ REG FROM SCRATCH BUFFER
          LDDL   CM+1
          LPML   CCFB,T2     MASK BITS
          NJN    CCF2        IF SET - CLOCK ERROR
          SODL   T2          DECREMENT LOOP COUNTER
          PJP    CCF1        DO FOR ENTIRE TABLE
          LDN    0           FLAG NO ERROR
          UJP    CCFX        EXIT

 CCF2     LDN    1           FLAG ERROR
          UJP    CCFX        EXIT

 CCFA     BSS    0           PFS REGISTERS
          CON    PPFS+1
          CON    PPFS+3
          CON    PPFS+5
          CON    PPFS+7
          CON    PPFS+11

 CCFB     BSS    0           MASK BITS FOR PFS REGISTERS
          CON    0#F000
          CON    0#E000
          CON    0#F000
          CON    0#E000
          CON    0#E000
          EJECT
**        CRS -  CHECK RETRY STATUS.
*                CHECK IF ERROR IS A SUCCESSFUL RETRY OR IF IT
*                IS A SOFT ERROR ONLY.
*
*         CALLED BY  APE
*
*         USES   CM, RCTR.
*
*         CALLS  FMB.
*
*         EXIT   (A) = 0 IF NOT SUCCESSFUL RETRY
*                (A) = 1 IF SUCCESSFUL RETRY


 CRS      SUBR               ENTRY / EXIT
          LDC    PPFS+4
          RJM    FMB         READ REGISTER CONTENTS
          CRDL   CM
          LDDL   CM+2
          LPC    M4101       MASK BIT
          NJN    CRS1        IF BIT SET
          LDN    0           SET FLAG
          UJP    CRSX        EXIT

 CRS1     LDN    0
          STML   RCTR        CLEAR RETRY COUNTER
          LDN    1           FLAG SUCCESSFUL RETRY
          UJP    CRSX        EXIT
          EJECT
**        ARS -  ANALYZE RETRY STATUS.
*                IF FIRST TIME AT THIS ERROR, LOG MODEL DEPENDENT
*                BUFFER AND RETRY INFORMATION.  ELSE, INCREMENT
*                COUNTER OF RETRY ATTEMPTS AND ADJUST PREVIOUS
*                MDB RETRY INFORMATION. FOR EITHER CASE, CLEAR
*                SOFT ERROR IN MONITOR CONDITION REGISTER.
*
*         USES   PSAVE, RCTR, RR, SHWD, CM, RADR, RDATA, RTP2
*
*         CALLS  CSE, LMB, WSH.
*
*         EXITS WITH TEMP CELL RTP2=0 IF FIRST TIME THROUGH

          ROUTINE ARS        ENTRY / EXIT
          CALL   CSE         CLEAR SOFT ERROR IN MCR
          LDM    MACF        ERROR FLAG
          NJP    ARSX        EXIT IF ERROR
          LDML   RCTR
          NJP    ARS1        IF NOT FIRST TIME THROUGH
          AOML   RCTR        BUMP COUNTER
          CALL   LMB         LOG MODEL DEPENDENT BUFFER
          LDML   BCWF        LOGGING FLAG
          SBN    2
          ZJP    ARSX        IF BUFFER NOT AVAILABLE
          LDN    SH.RI       DATA HEADER ID
          STML   SHWD+3
          LDN    LOD.RI      WORDS TO WRITE
          STML   SHWD
          CALL   WSH         WRITE SUBHEADER WORD
          AOML   LTOL        BUMP AMT TO LOG COUNTER
          LRD    RS+1
          AOD    RS          BUMP OFFSET
          ADC    RR
          CWML   PSAVE,ON    WRITE P REGISTER TO MDB
          SRD    RS+1        RESET R-REGISTER FOR SAVE
          LDD    RS+1
          STM    RADR+1
          LDD    RS+2
          STM    RADR+2
          AOML   LTOL        BUMP AMT TO LOG COUNTER
          LDN    CM
          RJM    CLR         CLEAR CM WORDS
          LDML   RCTR
          STDL   CM+3
          AOD    RS
          STM    RADR        SAVE THIS R-REG OFFSET
          ADC    RR
          CWDL   CM          WRITE COUNTER TO MDB
          LDN    0           SET FLAG TO INDICATE FIRST TIME
          STM    RTP2        SAVE TEMPORARILY
          UJP    ARSX        EXIT

 ARS1     LDML   BCWF        LOGGING FLAG
          SBN    2
          ZJP    ARSX        IF BUFFER NOT AVAILABLE
          SRD    RS+1        SAVE R-REGISTER
          LDD    RS          SAVE RS INFO AT RDATA
          STM    RDATA
          LDD    RS+1
          STM    RDATA+1
          LDD    RS+2
          STM    RDATA+2
          LDM    RADR+1      RESET R-REGISTER
          STD    RS+1
          LDM    RADR+2
          STD    RS+2
          LDN    CM
          RJM    CLR         CLEAR 4 WORDS
          AOML   RCTR        BUMP RETRY COUNTER
          STDL   CM+3        SAVE FOR MDB WRITE
          LRD    RS+1
          LDM    RADR        PREVIOUS ERROR OFFSET
          ADC    RR
          CWDL   CM          UPDATE RETRY COUNT
          LDM    RDATA       RESTORE RS DATA
          STD    RS
          LDM    RDATA+1
          STD    RS+1
          LDM    RDATA+2
          STD    RS+2
          LRD    RS+1        RESET R REGISTER
          LDN    1           SET FLAG - 2ND TIME OR MORE
          STM    RTP2        SAVE TEMPORARILY
          UJP    ARSX        EXIT
          EJECT
**        CCS -  CHECK CONTROL STORE ERROR
*                READ PFS 86 - BITS 3,6,7.  IF ANY OF THESE SET,
*                FATAL CONTROL STORE ERROR HAS OCCURRED.
*
*         ENTRY  OLSS = STATUS SUMMARY VALUE
*
*         CALLS  FMB
*
*         USES   CM.
*
*         EXIT   (A) = 0 IF NO ERROR.

 CCS      SUBR               ENTRY/EXIT
          LDC    PPFS+6      PFS REGISTER 86
          RJM    FMB
          CRDL   CM
          LDDL   CM
          LPC    M367        MASK FOR APPROPRIATE BITS
          NJN    CCS1        IF ANY SET
          LDN    0           FLAG NO ERROR
          UJP    CCSX        EXIT

 CCS1     LDM    OLSS        STATUS SUMMARY
          LPN    MSSM
          ZJN    CCS2        IF JOB MODE
          SETDAN (EPCH,DACSM)
          SETDAC PIFE        FATAL ERROR - MONITOR MODE
          UJN    CCS3

 CCS2     SETDAN (EPUN,DACSJ)
          SETDAC UEJM        FATAL ERROR - JOB MODE
 CCS3     LDN    1           FLAG ERROR
          UJP    CCSX        EXIT
          EJECT
**        CCT -  CHECK CPU/CM TIMEOUT
*                READ PFS 84 - BIT 42.  IF SET, CPU/CM TIMEOUT
*                HAS OCCURRED.  SET APPROPRIATE ACTION LIST.
*
*         CALLS  FMB
*
*         USES   CM.
*
*         EXIT   (A) = 0 IF NO ERROR.

 CCT      SUBR               ENTRY/EXIT
          LDC    PPFS+4      PFS REGISTER 84
          RJM    FMB
          CRDL   CM
          LDDL   CM+2
          LPN    0#20        MASK FOR APPROPRIATE BIT
          ZJP    CCTX        IF NOT SET, EXIT
          SETDAN (EPUN,DACCT)  SET ANALSIS CODE
          SETDAC UEJM        SET ACTION LIST
          LDN    1           FLAG ERROR
          UJP    CCTX        EXIT

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (960 ACTIONS FOR CPU ERRORS)
          SPACE  4,10
**        LMB -  LOG MODEL DEPENDENT BUFFER
*                CLEAR ERRORS AND WRITE SOFT REGISTERS,
*                REGISTER FILE, AND INSTRUCTIONS SURROUNDING
*                P TO MDB.  CHECK IF ANY ERRORS OCCURRED
*                DURING THE LOGGING PROCESS.  IF SO, LOG
*                PFS REGISTERS TO MDB.
*
*         ENTRY  NONE
*
*         CALLS  CLR, CLE, DLC, DEP, WSH, LSR, SDB, LRF, WPC, LNE.

          ROUTINE LMB        ENTRY/EXIT
          CALL   CLE         CLEAR ERRORS
          LDN    HDRP        DFT CONTROL WORD PTR
          RJM    IDA
          CRDL   CM          READ
          LDDL   CM+DHFLG
          SHN    21-DH.FD
          MJP    LMBX        IF NON-DEDICATED
          RJM    DEP         DETERMINE ERROR PRIORITY
          CALL   DLC         DETERMINE LOGGING CONDITIONS
          LDML   BCWF
          SBN    2
          ZJP    LMBX        IF BUFFER NOT AVAILABLE

*         LOG SOFT REGISTERS

          LDC    SHWD
          RJM    CLR         CLEAR CM FOR WRITE OF SUBHEADER
          LDN    SH.SR       TYPE CODE
          STML   SHWD+3
          LDN    LOD.SR      WORDS TO LOG
          STML   SHWD
          CALL   WSH         WRITE SUBHEADER WORD
          CALL   LSR         LOG SOFT REGISTERS
          LDM    MACF        ERROR FLAG
          NJP    LMB1        JUMP IF SET

*         LOG EXECUTING WORDS AROUND P

          LDC    SHWD
          RJM    CLR         CLEAR CM FOR WRITE OF SUBHEADER
          LDN    SH.EW       TYPE CODE
          STML   SHWD+3
          LDC    LOD.EW      WORDS TO LOG
          STML   SHWD
          CALL   WSH         BUILD SUBHEADER WORD
          CALL   WPC         WRITE PROGRAM CONTENTS

*         LOG REGISTER FILE

          CALL   SDB         SET DEC BIT 42
          LDM    MACF        ERROR FLAG
          NJP    LMB1        JUMP IF SET
          LDC    SHWD
          RJM    CLR         CLEAR CM FOR WRITE OF SUBHEADER
          LDN    SH.RF       TYPE CODE
          STML   SHWD+3
          LDC    LOD.RF      WORDS TO LOG
          STML   SHWD
          CALL   WSH         BUILD SUBHEADER WORD
          CALL   LRF         LOG REGISTER FILE
          LDM    MACF        ERROR FLAG
          NJN    LMB1        JUMP IF SET

*         CHECK IF ANY NEW ERRORS

          CALL   LNE         LOG ANY NEW ERRORS
          LDM    MACF        ERROR FLAG
          ZJP    LMBX        EXIT IF NOT SET

 LMB1     LDN    1
          STM    TERT        SET TERMINATE ACTION LIST
          SETDAC MCHP        NEW ACTION LIST
          UJP    LMBX        EXIT
          EJECT
**        DEP -  DETERMINE ERROR PRIORITY.
*                TEST DFT ANALYSIS CODE FOR RETRY IN
*                PROGRESS AND ASSIGN PRIORITY 1.  IF
*                NOT, ASSIGN PRIORITY 2.
*
*         ENTRY  (BDCA) = CURRENT ANALYSIS CODE.
*
*         EXIT   CELL CEPR SET WITH ERROR PRIORITY.

 DEP      SUBR               ENTRY/EXIT
          LDN    1
          STML   CEPR        DEFAULT TO RETRY IN PROGRESS
          LDDL   BC+BCDA     ANALYSIS CODE
          LPC    0#FF
          SBN    DARP        RETRY IN PROGRESS
          ZJN    DEPX        EXIT IF RETRY IN PROGRESS
          LDN    2
          STML   CEPR
          UJN    DEPX        EXIT
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (960 ACTIONS I)
          SPACE  4,10
**        TDE - TEST FOR DUPLICATE LOGGED ENTRIES.
*
*         METHOD       TEST FOR A MATCH BETWEEN NEW ERROR
*                      AND PREVIOUS ERROR WITH NO LENGTH
*                      ADJUSTMENT.
*
*         ENTRY  NA.
*
*         USES   LBUF, MFLG, TRMF.
*
*         CALLS  CFM.
*
*         EXIT   MFLG <> 0 = NO MATCH.

          ROUTINE TDE        ENTRY/EXIT
          LDML   LBUF
          RJM    CFM         TEST FOR MATCH
          STML   MFLG        MATCH FLAG
          UJP    TDEX        EXIT

*COPY CTP$DFT_LOG_ERROR_CHECK_MATCH
*COPY CTP$DFT_MDB_LOGGING_ROUTINES

          EJECT
**        LSR -  LOG SOFT REGISTERS.
*
*         ENTRY  (RS) HAS CURRENT R-REGISTER POINTER.
*
*         USES   W5, RS-RS+3, MRVAL, RN, CM.
*
*         CALLS  RPM, PAC, PCM

          ROUTINE LSR        ENTRY/EXIT
          LDD    RS
          STD    T2          SAVE INITIAL OFFSET
          LDN    0           TABLE INDEX
          STDL   W5
 LSR1     LDML   LSRA,W5     REGISTER FILE
          STDL   RN
          CALL   RPM         READ CONTENTS
          LDM    MACF        ERROR FLAG
          NJP    LSRX        EXIT IF SET
          RJM    PAC         PACK DATA IN MRVAL
          AOML   LTOL        INCREMENT AMOUNT TO LOG COUNTER
          LRD    RS+1        LOAD R REGISTER
          AOD    RS
          ADC    RR          ACTIVATE R-REGISTER
          CWML   MRVAL,ON    WRITE ONE WORD TO MDB
          AODL   W5          INCREMENT INDEX
          SBN    LOD.SR-1
          ZJN    LSR2        IF DONE
          UJP    LSR1        READ NEXT REGISTER

 LSR2     LDD    T2          SAVED OFFSET
          ADN    2           INCREMENT TO SECOND WORD (P)
          ADC    RR          ACTIVATE R-REGISTER
          CRML   PSAVE,ON    SAVE P REGISTER FOR FUTURE USE
          UJP    LSRX        EXIT

 LSRA     BSS    0           TABLE FOR SOFT REGISTERS
          CON    PVCM        VIRTUAL MACHINE CAPABILITY
          CON    PPRG        P-ADDRESS
          CON    PMPS        MPS
          CON    PMCR        MCR
          CON    PUCR        UCR
          CON    PUPR        UTP
          CON    PSTL        SEGMENT TABLE LENGTH
          CON    PSTA        SEGMENT TABLE ADDRESS
          CON    PBCR        BASE CONSTANT
          CON    PPTA        PAGE TABLE ADDRESS
          CON    PPTL        PAGE TABLE LENGTH
          CON    PPSM        PAGE SIZE MASK
          CON    PMDF        MODEL DEPENDENT FLAGS
          CON    PMMR        MTR MASK
          CON    PJPS        JPS
          CON    PSIT        SYSTEM INTERVAL TIMER
          CON    PKBP        KEYPOINT BUFFER POINTER
          CON    PTPE        TRAP ENABLE
          CON    PTRP        TRAP POINTER
          CON    PDLP        DEBUG LIST PTR
          CON    PKPM        KEYPOINT MSK
          CON    PPIT        PROCESS INTERVAL TIMER
          CON    PCCF        CRITICAL FRAME FLAG
          CON    POCF        ON CONDITION FLAG
          CON    PDBI        DEBUG INDEX
          CON    PDBM        DEBUG MASK
          CON    PUSM        USER MASK
          EJECT
**        LRF -  LOG REGISTER FILE.
*
*         ENTRY  (RS) SET UP FOR MODEL DEPENDENT BUFFER ACCESS.
*
*         CALLS  PAC, RPM.

          ROUTINE LRF        ENTRY/EXIT
          LRD    RS+1        LOAD R REGISTER
          LDN    0           INDEX
          STML   LRFA        SAVE
 LRF1     RDMEM  RF.FWA,LRFA,,,8,TC.RGU        READ WORD
          ZJP    LRF2        IF READ COMPLETED
          STM    MACF
          FUNCMR HBUF+CPRPC,MRMC    MASTER CLEAR PROCESSOR
          SETDAN (EPCH,DAMCH)       SET NEW ANALYSIS CODE
          UJP    LRFX        EXIT
 LRF2     BSS    0
          RJM    PAC         PACK DATA INTO MRVAL
          AOML   LTOL        INCREMENT MDB COUNTER
          AOD    RS
          ADC    RR          ACTIVATE R-REGISTER
          CWML   MRVAL,ON    WRITE TO MDB
          AOML   LRFA        UPDATE READ INDEX
          LMC    RFLOG
          ZJP    LRFX        EXIT IF DONE
          UJP    LRF1        GET NEXT WORD

 LRFA     CON    0           OFFSET FOR READING
          EJECT
**        LNE -  LOG NEW ERROR.
*
*         CALLS  RPM, PAC, WSH, CLE.
*
*         USES   T2, RN, MRVAL, SHWD, RS.

          ROUTINE LNE        ENTRY/EXIT
          LDN    9D
          STDL   T2          SAVE INDEX
 LNE1     LDML   LNEA,T2     GET REGISTER NUMBER
          STDL   RN
          CALL   RPM         READ REGISTER CONTENTS
          LDM    MACF        ERROR FLAG
          NJP    LNEX        IF ERROR
          RJM    PAC         PACK DATA INTO MRVAL
          LDML   MRVAL
          ADML   MRVAL+1
          ADML   MRVAL+2
          ADML   MRVAL+3
          NJN    LNE2        IF ERROR
          SODL   T2
          PJN    LNE1        READ NEXT REGISTER
          UJP    LNEX        FINISHED, NO ERROR

*         WRITE SUBHEADER WORD

 LNE2     LDC    SHWD
          RJM    CLR         CLEAR CM FOR WRITE OF SUBHEADER
          LDN    SH.EL       TYPE CODE
          STML   SHWD+3
          LDN    LOD.EL      WORDS TO LOG
          STML   SHWD
          CALL   WSH         WRITE SUBHEADER WORD
          LDN    0
          STD    T2
 LNE3     LDML   LNEA,T2
          STDL   RN
          CALL   RPM         READ REGISTER
          LDM    MACF        ERROR FLAG
          NJP    LNEX        IF ERROR
          RJM    PAC         PACK DATA INTO MRVAL
          AOML   LTOL        INCREMENT AMOUNT TO LOG COUNTER
          LRD    RS+1        LOAD R REGISTER
          AOD    RS
          ADC    RR          ACTIVATE R-REGISTER
          CWML   MRVAL,ON    WRITE TO MDB
          AODL   T2          BUMP INDEX
          SBN    LOD.EL-1
          NJN    LNE3        DO NEXT REGISTER

 LNE4     CALL   CLE         CLEAR ERRORS
          UJP    LNEX        EXIT

 LNEA     BSS    0           LIST OF PFS REGISTERS
          CON    PPFS
          CON    PPFS+1
          CON    PPFS+2
          CON    PPFS+3
          CON    PPFS+4
          CON    PPFS+5
          CON    PPFS+6
          CON    PPFS+7
          CON    PPFS+10
          CON    PPFS+11
          EJECT
**        LEP -  LOG EXCHANGE PACKAGE.
*                CALL ROUTINE TO FIX EXCHANGE PACKAGE.  READ
*                EXCHANGE PACKAGE FROM CENTRAL MEMORY AND
*                LOG TO MODEL DEPENDENT BUFFER.
*
*         ENTRY  NONE.
*
*         USES   RDATA, MRVAL, SHWD, T4, W4-W6, RN.
*
*         CALLS  FEP, CLR, WSH, LWA, WMB.

          ROUTINE LEP        ENTRY/EXIT
          RJM    FEP         FIX EXCHANGE PACKAGE
          LDML   BCWF        LOGGING FLAG
          SBN    2
          ZJP    LEP4        IF BUFFER NOT AVAILABLE
          LDN    HDRP        DFT CONTROL WORD PTR
          RJM    IDA
          CRDL   CM          READ
          LDDL   CM+DHFLG
          SHN    21-DH.FD
          MJP    LEP4        IF NON-DEDICATED
          LDC    SHWD
          RJM    CLR         CLEAR CM FOR WRITE OF SUBHEADER
          LDN    SH.JEP      EXCHANGE PACKAGE
          STML   SHWD+3
          LDN    LOD.JEP     WORDS TO LOG
          STML   SHWD
          CALL   WSH         BUILD SUBHEADER WORD
          LDN    LOD.JEP-1   INDEX
          STD    T4
          LDC    EPBA
          RJM    LWA         SET UP R-REGISTER FOR XP READ

*         TRANSFER EXCHANGE PACKAGE TO MDB

 LEP2     CRML   MRVAL,ON    READ XP WORD
          RJM    WMB         WRITE TO MODEL DEPENDENT BUFFER
          SOD    T4
          ZJN    LEP4        IF DONE
          LRD    W4          RESET R-REG TO XP
          AOD    W6
          ADC    RR
          UJN    LEP2        READ NEXT WORD

 LEP4     BSS    0
          ZJP    LEPX        EXIT IF DUE ALREADY SET
          EJECT
**        FEP -  FIX EXCHANGE PACKAGE.
*                CLEAR PND BIT IN EXCHANGE PKG IF ERROR IS
*                JOB HALT. IF ERROR NOT SOFTWARE ERROR, SET
*                MCR BIT 48 IN EXCHANGE PACKAGE.  WRITE P
*                OF ERROR IN EXCHANGE PACKAGE IN CASE IT WAS
*                LOST DURING MASTER CLEAR.
*
*         ENTRY  NONE.
*
*         USES   T1, RDATA, MRVAL.
*
*         CALLS  HAC, LWA, SPB, RMR, SAC.

 FEP      SUBR               ENTRY/EXIT

*         SET PP BOUNDS AND MEMORY BOUNDS

          RJM    HAC         HALT ALL OTHER PROCESSORS
          LDC    EPBA
          RJM    LWA         SET UP R-REGISTER FOR XP READ
          RJM    SPB         SET PP BOUNDS
          LDN    MBRG
          STDL   RN
          LDML   CMCC
          RJM    RMR         READ MEMORY BOUNDS REGISTER
          LDML   RDATA
          STML   FEPA        (FEPA)=MEMORY BOUNDS, BYTE 0
          LPC    0#BF        DISABLE MEM BOUNDS
          STML   RDATA
          WRITMR RDATA,CMCC,MBRG
          LRD    W4

*         CLEAR PND IF NECESSARY

          LDDL   BC+BCDA     ANALYSIS CODE
          LPC    0#FF
          SBN    DAUHV
          NJN    FEP1        IF NOT JOB HALT VECTOR
          LDD    W6          OFFSET
          ADN    2           WORD TWO OF JOB XP
          ADC    RR
          CRML   MRVAL,ON    READ WORD 2
          LDML   MRVAL
          LPC    0#EFFF
          STML   MRVAL       CLEAR PND BIT
          LDD    W6
          ADN    2
          ADC    RR
          CWML   MRVAL,ON    WRITE BACK TO XP

*         SET BIT 48 OF MCR IF NECESSARY

 FEP1     BSS    0
          LDDL   BC+BCDA     ANALYSIS CODE
          LPC    0#FF
          SBN    DASWH       SOFTWARE ERROR
          ZJP    FEP2        DONT SET DUE
          LDD    W6          OFFSET
          ADN    6           READ WORD 6 OF JOB XP
          ADC    RR
          CRML   MRVAL,ON    READ WORD 2
          LDML   MRVAL
          LPC    0#8000
          NJP    FEP2        IF DUE ALREADY SET
          LDC    0#8000
          RAML   MRVAL       SET BIT IN EXCH PKG
          LDD    W6
          ADN    6
          ADC    RR
          CWML   MRVAL,ON    WRITE BACK TO XP

*         RESTORE P IN EXCHANGE PACKAGE

 FEP2     BSS    0
          LDD    W6
          ADC    RR
          CWML   PSAVE,ON    WRITE P TO EXCH PKG

*         RESTORE PP AND MEMORY BOUNDS

 FEP3     BSS    0
          LDML   FEPA
          STML   RDATA
          WRITMR RDATA,CMCC,MBRG
          LRD    DP+1        ENSURE CORRECT BOUNDS
          RJM    SPB         RESTORE PP BOUNDS
          LDML   HBUF+CPRPC
          RJM    SAC         START OTHER PROCESSORS
          UJP    FEPX        RETURN

 FEPA     CON    0
          EJECT
**        WPC -  WRITE PROGRAM CONTENTS.
*
*         METHOD TRANSLATE P FROM A PVA TO AN RMA.
*                WRITE RESPECTIVE PTE TO MDB.  ADD
*                AND SUBTRACT 5 WORDS ON EACH SIDE OF
*                P. IF A PAGE BOUNDARY IS CROSSED, THE
*                APPROPRIATE ROUTINE IS CALLED. OTHERWISE,
*                LOG THE 5 INSTRUCTIONS ON EACH SIDE OF
*                P (INCLUDING P) TO THE MDB.
*
*         ENTRY  NONE.
*
*         CALLS  PVC, MSA, SPT, WRZ, RWP, GPP, GNP, WMB.

          ROUTINE WPC        ENTRY/EXIT
          RJM    PVC         PRESET VIRTUAL CONSTANTS
          RJM    MSA         MAKE SYSTEM VIRTUAL ADDRESS
          ZJP    WPC3        IF NOT VALID
          AOML   LTOL        BUMP MDB COUNTER
          AOD    RS
          LRD    RS+1
          ADC    RR          ACTIVATE R-REGISTER
          CWDL   W0          WRITE SEG TABL ENTRY TO MDB
          RJM    SPT         SEARCH PAGE TABLE
          ZJP    WPC2        IF PAGE MISS

*         SAVE RMA

          STDL   T3
          SRD    T1
          LDDL   T1
          STML   WPCA        SAVE UPPER 10 BITS
          LDDL   T2
          STML   WPCA+1      SAVE MID 12 BITS

*         WRITE PTE TO MODEL DEPENDENT BUFFER

          AOML   LTOL        INCREMENT LENGTH TO LOG COUNTER
          AOD    RS          INCREMENT MDB ADDRESS
          LRD    RS+1
          ADC    RR
          CWML   SPTJ,ON     WRITE PTE TO MDB

*         CHECK PAGE BOUNDARIES

          LDML   PSMV1
          LPML   MSAA+3
          SHN    -3
          STML   WPCB        PAGE OFFSET (IN WORDS)
          SBN    5
          MJN    WPC0
          ADN    11D
          STDL   T4          PAGE OFFSET + 6 WORDS
          LDML   PSMV
          LMC    0#7F
          SHN    6
          LPML   T4          MASK FOR OVERFLOW
          NJN    WPC1        IF CROSSING BOTTOM OF PAGE BDRY

*         WRITE 11 WORDS FROM 1 PAGE TO MDB

          LDN    1
          RJM    WRZ         WRITE ZEROS TO 2ND PTE
          LDN    11D         NUMBER OF WORDS TO WRITE
          STDL   W4
          LDDL   T3
          SBN    5
          RJM    RWP         WRITE PROGRAM CONTENTS TO MDB
          LJM    WPCX

 WPC0     RJM    GPP         GET PREVIOUS PAGE
          LJM    WPCX

 WPC1     LDDL   T4          PO + 6
          LPN    0#3F
          STDL   T4          NUMBER OF WORDS TO READ FROM NEXT PAGE
          RJM    GNP         GET NEXT PAGE
          LJM    WPCX

 WPC2     LDN    12D
          STDL   T2
          UJP    WPC4

 WPC3     LDN    13D
          STDL   T2
 WPC4     LDC    0#FFFF
          STML   MRVAL
          STML   MRVAL+1
          STML   MRVAL+2
          STML   MRVAL+3
          RJM    WMB         WRITE ALL F'S TO MDB
          LDDL   T2
          RJM    WRZ         WRITE ALL ZEROS
          LJM    WPCX        EXIT

 WPCA     CON    0,0,0       STORES RMA FOR P
 WPCB     CON    0           PAGE OFFSET FOR P
          EJECT
**        MSA -  MAKE SYSTEM VIRTUAL ADDRESS.
*
*         ENTRY  NONE
*
*         EXIT   (CM - CM+2) = SYSTEM VIRTUAL ADDRESS.
*                (W0 - W3) = SEGMENT TABLE ENTRY.
*
*         USES   W0-W6, T1-T4, CM.
*
*         CALLS  LWA.
*
*         MACROS NONE.


 MSA1     LDN    0           FLAG INVALID/MISSING SEGMENT

 MSA      SUBR               ENTRY/EXIT
          LDML   PSAVE+1     RING AND SEG NUMBER OF P-REG
          LPC    0#FFF       ZERO OUT RING NUMBER
          STML   MSAA+1
          LDML   PSAVE+3
          LPN    BOB         BYTE OFFSET BITS
          STML   MSAB        (MSAB) = BYTE OFFSET
          LDML   PSAVE+3
          SCN    BOB
          STML   MSAA+3      CHANGE TO WORD BOUNDARY
          LDML   PSAVE+2
          STML   MSAA+2
          LDML   STAV        SEGMENT TABLE ADDRESS
          STD    T2
          LDML   STAV+1
          STDL   T3          SEGMENT TABLE ADDRESS
          LDML   STLV        SEGMENT TABLE LENGTH
          SBML   MSAA+1
          MJP    MSA1        IF NOT A VALID SEGMENT
          LDDL   T3          FORM WORD ADDRESS FOR LWA
          SHN    -3
          STDL   T3
          LDD    T2
          LPN    7
          SHN    13D
          RADL   T3
          LDDL   T2
          SHN    -3
          STDL   T2
          LDN    T2
          RJM    LWA         LOAD ADDRESS OF SEGMENT TABLE
          ADML   MSAA+1      ADD SEGMENT OF INTEREST
          CRDL   W0          FETCH ASID
          LDDL   W0
          LPC    0#8000
          ZJP    MSA1        IF INVALID
          LDDL   W1
          ZJP    MSA1        IF NOT A VALID ASID
          STDL   CM          SAVE ASID
          LDML   MSAA+2      COPY REMAINDER OF PVA
          STDL   CM+1
          LDML   MSAA+3
          STDL   CM+2
          LDN    1
          UJP    MSAX        RETURN

 MSAA     BSSZ   4
 MSAB     CON    0

*COPY CTP$DFT_PVA_TO_RMA_ROUTINES

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (960 ACTIONS II)
          SPACE  4,10
**        RCM -  RELOAD SOFT CONTROL MEMORIES.
*                READ IN 2AP (CTI) TO RELOAD ALL CONTROL MEMORIES.
*                CHECK SUCCESS OF RELOAD.  IF SUCCESSFUL, EXIT.  IF
*                NOT, SWEEP MEMORIES TO LOCATE FAILING ADDRESS AND
*                WRITE ADDRESS AND ASSOCIATED PFS REGISTER TO MDB.
*
*         ENTRY  CTIB DEFAULTS TO ALL MEMORIES TO RELOAD
*
*         CALLS  ECM, SCM, LSC, SDB.

          ROUTINE RCM        ENTRY / EXIT

*         SAVE R-REGISTER

          LDD    RS
          STM    RDATA
          LDD    RS+1
          STM    RDATA+1
          LDD    RS+2
          STM    RDATA+2
          LDDL   BC          SAVE ANALYSIS CODE
          STML   RDATA+4
          LDDL   BC+1
          STML   RDATA+5
          LDDL   BC+2
          STML   RDATA+6
          LDDL   BC+3
          STML   RDATA+7

*         SET UP CALL BLOCK FOR CTI

          LDC    0           (SHOULD BE 1F HEX - TEMP DISABLED)
          STML   CTIB
          LDN    25B
          STML   CALB        CTI FUNCTION
          LDML   CPUO
          STML   CALB+1      CPU ORDINAL
          LDML   CTIB
          STML   CALB+2      BITS SPECIFYING MEMORIES

*         READ IN 2AP AND EXECUTE

***       RJM    PFC         EXECUTE CIP MODULE (TEMP DISABLED)

*         RESTORE R-REGISTER

          LDM    RDATA
          STD    RS
          LDM    RDATA+1
          STD    RS+1
          LDM    RDATA+2
          STD    RS+2
          LRD    RS+1
          LDML   RDATA+4     RESTORE ANALYSIS CODE
          STDL   BC
          LDML   RDATA+5
          STDL   BC+1
          LDML   RDATA+6
          STDL   BC+2
          LDML   RDATA+7
          STDL   BC+3

*         ANALYZE RELOAD

          LDML   CALB+2
          STML   CTIBR       SAVE RETURNED RESULTS
          ZJP    RCM5        IF RELOAD SUCCESSFUL
          LDML   BCWF        LOGGING FLAG
          SBN    2
          ZJP    RCM5        IF BUFFER NOT AVAILABLE
          LDN    HDRP        DFT CONTROL WORD PTR
          RJM    IDA
          CRDL   CM          READ
          LDDL   CM+DHFLG
          SHN    21-DH.FD
          MJP    RCM5        IF NON-DEDICATED
          LDDL   BC+BCDA     DFT ANALYSIS CODE
          LPC    0#FF        CODE ONLY
          SBN    DARP        RETRY IN PROGRESS
          NJP    RCM0        IF NOT RETRY
          LDML   RCTR        RETRY COUNTER
          SBN    2
          PJP    RCM5        IF NOT FIRST TIME

*         CHECK EACH MEMORY

 RCM0     CALL   SDB         SET SWEEP BIT IN DEC
          LDM    MACF        ERROR FLAG
          NJP    RCM6        IF SET
          LDN    0
          STM    SHWF        INDEX
          LDML   CTIBR
          SHN    21-4
          PJN    RCM1        IF BIT NOT SET
          LDN    0           INDEX FOR SWEEP ROUTINE
          RJM    SCM         SWEEP CONTROL MEMORY
          ZJN    RCM1        IF DID NOT SEE ERROR AGAIN
          LDM    MACF        ERROR FLAG
          NJP    RCM6        IF ERROR
          CALL   LSC         LOG INFORMATION TO MDB
 RCM1     LDML   CTIBR
          SHN    21-3
          PJN    RCM2        IF BIT NOT SET
          LDN    1           INDEX FOR SWEEP ROUTINE
          RJM    SCM         SWEEP CONTROL MEMORY
          ZJN    RCM2        IF DID NOT SEE ERROR AGAIN
          LDM    MACF        ERROR FLAG
          NJP    RCM6        IF ERROR
          CALL   LSC         LOG INFORMATION TO MDB
 RCM2     LDML   CTIBR
          SHN    21-2
          PJN    RCM3        IF BIT NOT SET
          LDN    2           INDEX FOR SWEEP ROUTINE
          RJM    SCM         SWEEP CONTROL MEMORY
          ZJN    RCM3        IF DID NOT SEE ERROR AGAIN
          LDM    MACF        ERROR FLAG
          NJP    RCM6        IF ERROR
          CALL   LSC         LOG INFORMATION TO MDB
 RCM3     LDML   CTIBR
          SHN    21-1
          PJN    RCM4        IF BIT NOT SET
          LDN    3           INDEX FOR SWEEP ROUTINE
          RJM    SCM         SWEEP CONTROL MEMORY
          ZJN    RCM4        IF DID NOT SEE ERROR AGAIN
          LDM    MACF        ERROR FLAG
          NJP    RCM6        IF ERROR
          CALL   LSC         LOG INFORMATION TO MDB
 RCM4     LDML   CTIBR
          SHN    21-0
          PJN    RCM5        IF BIT NOT SET
          LDN    4           INDEX FOR SWEEP ROUTINE
          RJM    SCM         SWEEP CONTROL MEMORY
          ZJN    RCM5        IF DID NOT SEE ERROR AGAIN
          LDM    MACF        ERROR FLAG
          NJP    RCM6        IF ERROR
          CALL   LSC         LOG INFORMATION TO MDB
 RCM5     CALL   SMA         RELOAD MAR TO ORIG VALUE
          LDM    MACF        ERROR FLAG
          NJN    RCM6        IF ERROR
          CALL   CDB         CLEAR SWEEP BIT IN DEC REG
          LDM    MACF        ERROR FLAG
          ZJP    RCMX        EXIT IF CLEAR
 RCM6     LDN    1
          STM    TERT        TERMINATE ACTION LIST
          SETDAC MCHP        NEW ACTION LIST
          LJM    RCMX        EXIT
          EJECT
**        SCM -  SWEEP SOFT CONTROL MEMORIES.
*                SWEEP INDICATED MEMORY AND LOCATE FAILING ADDRESS.
*
*         ENTRY  (A) = INDEX TO DETERMINE WHICH MEMORY TO SWEEP.
*
*         CALLS  AMR, CMI, PAC, RPM.
*
*         EXIT   (A) = 0 IF NO NEW PARITY ERROR OCCURRED
*                MRVAL = ASSOCIATED PFS REGISTER VALUE
*                FAIL = FAILING ADDRESS IF SWEEP DETECTED ERROR
*                (SN) = CODE (INDEX) FOR FAILING MEMORY

 SCM      SUBR               ENTRY / EXIT
          STDL   SN          SAVE OFFSET TO TABLES
          LDM    HBUF+CPRPC
          STDL   EC
          FUNCMR ,MRCE       CLEAR ERRORS (CPU)
          LDN    0
          STML   FAIL        INITIALIZE ADDRESS OFFSET
 SCM2     LDML   SCMA,SN     LOAD STARTING ADDRESS
          ADML   FAIL        ADD OFFSET
          STDL   RN
          LDDL   SN
          NJN    SCM2.5      IF NOT CONTROL STORE
          LDN    0
          STML   SMAA+6
          STML   SMAA+7
          WRITMR SMAA,HBUF+CPRPC,PCSA   SET MAR TO ZERO
 SCM2.5   BSS    0

          EXITMR SCM3

          LDM    HBUF+HDRPC  FORM FUNCTION WORD
          ADC    MRRD
          ADML   SCMB,SN     ADD TYPE CODE
          RJM    AMR         ACCESS MNTCE CHANNEL
          LDDL   SN
          NJN    SCM2.6      IF NOT CONTROL STORE
          LDN    16D         BYTE COUNT FOR CS
          UJN    SCM2.7      CONTINUE
 SCM2.6   LDN    1           BYTE COUNT FOR ALL OTHERS
 SCM2.7   IAM    SCMI,MR     BLOCK INPUT - READ MEMORY
          RJM    CMI         CLEAR MNTCE INTERLOCK

 SCM3     EXITMR FMR

          ZJN    SCM3.5      IF READ COMPLETED
          STM    MACF        SET ERROR FLAG
          UJP    SCMX        EXIT

 SCM3.5   LDML   SCME,SN     ASSOCIATED PFS REGISTER
          STDL   RN
          CALL   RPM         READ CONTENTS
          LDM    MACF        ERROR FLAG
          NJP    SCMX        EXIT IF SET
          RJM    PAC         PACK DATA INTO MRVAL
          LDN    3
          STD    T2
 SCM4     LDML   MRVAL,T2    PFS DATA
          STML   CM,T2       MOVE TO CM
          SOD    T2
          PJN    SCM4        MOVE 4 WORDS
          LDML   SCMC,SN     LOAD ADDRESS
          STDL   T1
          LDI    T1          LOAD INTERESTING BYTE
          LPML   SCMF,SN     MASK
          NJP    SCM6        IF ERROR
          LDD    SN
          SBN    2
          PJN    SCM5        IF NOT CS OR IFD
          LDML   SCMG,SN
          STDL   T1
          LDI    T1          LOAD INTERESTING BYTE
          LPML   SCMH,SN     MASK
          NJN    SCM6        IF ERROR
 SCM5     AOML   FAIL        UPDATE ADDRESS OFFSET
          SBML   SCMD,SN     SUBTRACT LENGTH + 1
          MJP    SCM2        IF NOT DONE SWEEPING
          LDN    0           SET FLAG  - NO ERROR
          UJP    SCMX        EXIT

 SCM6     LDML   SCMA,SN     STARTING ADDRESS OF MEMORY
          RAML   FAIL
          LDM    HBUF+CPRPC
          STDL   EC
          FUNCMR ,MRCE       CLEAR ERRORS (CPU)
          LDN    1           SET ERROR FLAG
          UJP    SCMX        EXIT

 SCMA     BSS    0           STARTING MEMORY ADRESSES
          CON    IDU.CSA
          CON    IFD.FWA
          CON    BDP.FWA
          CON    ACU.FWA
          CON    REF.FWA

 SCMB     BSS    0           TYPE CODES
          CON    TC.IDU
          CON    TC.IFD
          CON    TC.BDP
          CON    TC.ACU
          CON    TC.REF

 SCMC     BSS    0           OFFSETS TO CM (PFS DATA)
          CON    OCSM
          CON    OIFD
          CON    OBDP
          CON    OACU
          CON    OREF

 SCMD     BSS    0           MEMORY SIZE (LENGTH + 1)
          CON    0#800
          CON    0#200
          CON    0#600
          CON    0#100
          CON    0#100

 SCME     BSS    0           ASSOCIATED PFS REGISTERS
          CON    0#86
          CON    0#86
          CON    0#81
          CON    0#80
          CON    0#86

 SCMF     BSS    0           PFS REGISTER BIT MASKS
          CON    0#03FF         ( + FFFC)
          CON    0#00E0
          CON    0#1050
          CON    0#000E
          CON    0#0200

 SCMG     BSS    0           OFFSETS TO CM (EXTRA PFS DATA)
          CON    OCSM+1
          CON    OIFD+1

 SCMH     BSS    0           PFS REG BIT MASKS FOR 2ND WORD
          CON    0#FFFC
          CON    0#E000

 SCMI     BSS    0           BLOCK FOR READ OF SCM
          BSSZ   20          16 DECIMAL WORDS
          EJECT
**        LSC -  LOG SOFT CONTROL INFORMATION.
*                WRITE FAILING ADDRESSES AND ASSOCIATED PFS REGISTER
*                DATA TO THE MODEL DEPENDENT BUFFER.
*
*         ENTRY  FAIL = FAILING ADDRESS OF SOFT CONTROL MEMORY .
*                MRVAL = ASSOCIATED PFS REGISTER DATA.
*                SHWF = FLAG TO DETERMINE LOGGING OF SUBHEADER WORD.
*                       IF 0, LOG SUBHEADER.
*                SN = CODE FOR FAILING MEMORY
*
*         CALLS  CLR, BSW.

          ROUTINE LSC        ENTRY / EXIT
          LDM    SHWF
          NJP    LSC1        BRANCH IF SUBHEADER DONE
          LDN    HDRP        DFT CONTROL WORD PTR
          RJM    IDA
          CRDL   CM          READ TO CM
          LDDL   CM+DHFLG
          SHN    21-DH.FD
          PJN    LSC0        IF DEDICATED MODE
          CALL   LMB         CREATE HEADER WORD IN MDB
          LDML   BCWF
          SBN    2
          ZJP    LSCX        IF NO BUFFER AVAILABLE
 LSC0     LDC    SHWD
          RJM    CLR         CLEAR CM FOR WRITE OF SUBHEADER
          LDN    SH.CMPE     TYPE CODE
          STML   SHWD+3
          LDN    LOD.CMPE    WORDS TO LOG
          STML   SHWD
          CALL   WSH         WRITE SUBHEADER WORD
          AOM    SHWF
 LSC1     AOML   LTOL        BUMP MDB COUNTER
          LDN    CM
          RJM    CLR         CLEAR CM WORDS
          LDML   FAIL        FAILING ADDRESS
          STDL   CM+3
          LDD    SN          CODE TO INDICATE MEMORY
          STDL   CM
          LDML   SCME,SN     PFS REG ASSOCIATED
          STDL   CM+1        SAVE
          AOD    RS
          LRD    RS+1        SET UP R-REGISTER
          ADC    RR          ACTIVATE R-REGISTER
          CWDL   CM          WRITE FAILING ADDRESS
          AOML   LTOL
          AOD    RS
          ADC    RR
          CWML   MRVAL,ON    WRITE PFS REGISTER
          UJP    LSCX        EXIT
          EJECT
**        ELB -  END LOGGING TO MODEL DEPENDENT BUFFER.
*
*         METHOD CALL WSH ROUTINE AND INDICATE THAT LOGGING IS
*                COMPLETE BY SETTING SHWD+0 TO ZERO.  WSH THEN
*                UPDATES AMOUNT LOGGED IN MDB.
*
*         CALLS  WSH.

          ROUTINE ELB        ENTRY / EXIT
          LDML   BCWF        LOGGING FLAG
          SBN    2
          ZJP    ELBX        IF BUFFER NOT AVAILABLE
          LDN    HDRP        DFT CONTROL WORD PTR
          RJM    IDA
          CRDL   CM          READ
          LDDL   CM+DHFLG
          SHN    21-DH.FD
          MJP    ELBX        IF NON-DEDICATED
          LDN    0
          STML   SHWD        FLAG LENGTH = ZERO
          CALL   WSH         CALL ROUTINE TO WRITE AMOUNT LOGGED
          UJP    ELBX        EXIT
          SPACE  4,10
**        MCP -  MASTER CLEAR PROCESSOR.
*
          ROUTINE MCP        ENTRY / EXIT
          LDDL   BC+BCDA     ANALYSIS CODE
          LPC    0#FF        MASK
          SBN    DACCT       CPU/CM TIMEOUT
          NJP    MCPX        EXIT IF NOT TIMEOUT
          FUNCMR HBUF+CPRPC,MRMC   MASTER CLEAR PROCESSOR
          UJP    MCPX        EXIT
          EJECT
**        PJH - PROCESS JOB HALF-EXCHANGE OUT
*
*         METHOD IF MONITOR MODE, EXIT.  ELSE HALF EXCHANGE
*                OUT AND SAVE JOB EXCHANGE PACKAGE IN MDB.
*
*         CALLS  CLR, MCP, HEO, LEP.

          ROUTINE PJH        ENTRY/EXIT

          LDM    OLSS        STATUS SUMMARY
          LPN    MSSM
          NJP    PJHX        EXIT IF MONITOR MODE
          CALL   CLE         CLEAR ERRORS
          CALL   MCP         MASTER CLEAR PROCESSOR
          CALL   HEO         HALF EXCHANGE OUT
          CALL   LEP         LOG EXCHANGE PACKAGE TO MDB
          UJP    PJHX        EXIT ROUTINE
          SPACE  4,10
**        CSE - CLEAR SOFT ERROR FROM MCR
*
*         METHOD IF RETRY ERROR, CLEAR SOFT ERROR BIT IN
*                MONITOR CONDITION REGISTER.
*
*         CALLS  RPM.

          ROUTINE CSE        ENTRY/EXIT

          LDC    PMCR        MONITOR CONDITION REGISTER
          STD    RN
          CALL   RPM         READ REGISTER
          LDM    MACF        ERROR FLAG
          NJP    CSEX        EXIT IF ERROR
          LDML   RDATA+7
          LPC    0#FFFD      MASK OUT SOFT ERROR BIT
          STML   RDATA+7     REWRITE DATA
          WRITMR RDATA,HBUF+CPRPC,PMCR
          UJP    CSEX        EXIT ROUTINE
          EJECT
**        SDB -  SET DEC BIT 42.
*
*         USES   RDATA.
*
*         MACROS READMR, WRITMR.

          ROUTINE SDB        ENTRY / EXIT

          LDC    DEMR        DEC REGISTER
          STD    RN
          CALL   RPM         READ REGISTER
          LDM    MACF        ERROR FLAG
          NJP    SDBX        IF ERROR
          LDML   RDATA+5
          SCN    DEC42                      CLEAR BIT
          LMN    DEC42                      SET/CLEAR BIT
          STML   RDATA+5
          WRITMR RDATA,HBUF+HDRPC,DEMR      WRITE DEC REGISTER
          UJP    SDBX        EXIT
          SPACE  4,10
**        CDB -  CLEAR DEC BIT 42.
*
*         USES   RDATA.
*
*         MACROS READMR, WRITMR.

          ROUTINE CDB        ENTRY / EXIT

          LDC    DEMR        DEC REGISTER
          STD    RN
          CALL   RPM         READ REGISTER
          LDM    MACF
          NJP    CDBX        EXIT IF ERROR FLAG SET
          LDML   RDATA+5
          SCN    DEC42                      CLEAR BIT
          STML   RDATA+5
          WRITMR RDATA,HBUF+HDRPC,DEMR      WRITE DEC REGISTER
          UJP    CDBX        EXIT
          EJECT
**        SMA -  SET MICRAND ADDRESS REGISTER.
*                SET MICRAND ADDRESS REGISTER (MAR OR CSA) EQUAL
*                TO VALUE IN MARA.
*
*         ENTRY  MARA = VALUE TO WRITE INTO MAR (MICRAND ADDR REG).
*
*         MACROS WRITMR

          ROUTINE SMA        ENTRY / EXIT

          CALL   SDB         MAKE SURE DEC BIT 42 IS SET
          LDM    MACF        ERROR FLAG
          NJP    SMAX        EXIT IF SET
          LDML   MARA        GET VALUE TO WRITE
          STML   SMAA+7
          SHN    -10
          STM    SMAA+6
          WRITMR SMAA,HBUF+CPRPC,PCSA       SET CSA (MAR)
          UJP    SMAX        EXIT

SMAA      BSSZ   10B
          SPACE  4,10
**        RPM - READ PIP MAINTENANCE REGISTER.
*
*         ENTRY  (RN) = REGISTER NUMBER.
*                *RDATA - RDATA+7* NEEDS TO BE DEFINED.
*
*         EXIT   IF NO ERROR -
*                (RDATA - RDATA+7) IS REGISTER DATA IN BYTE FORMAT.
*                IF ERROR -
*                (MACF) = NON ZERO.  CPU IS MASTER CLEARED. SETDAN
*                IS EXECUTED TO CHANGE THE DFT ANALYSIS CODE TO '30'.
*

          ROUTINE RPM        ENTRY/EXIT

          LDM    HBUF+HDRPC    ELEMENT CODE
          STD    EC          SAVE ELEMENT CODE
          READMR RDATA       READ REGISTER INTO RDATA
          ZJP    RPMX        IF NO ERROR
          STM    MACF        IF READ DID NOT FINISH
          FUNCMR HBUF+CPRPC,MRMC    MASTER CLEAR PROCESSOR
          SETDAN (EPCH,DAMCH)       SET NEW ANALYSIS CODE
          UJP    RPMX        EXIT ROUTINE
          EJECT
**        CCM -  CHECK CPU MAC HUNG.
*                CHECK TO SET THAT LAST READ OVER THE MAC CHANNEL
*                COMPLETED BY CHECKING VALUE OF MACF CELL.
*
*         ENTRY  MACF = 0 IF LAST OPERATION COMPLETED
*                       1 IF LAST OPERATION HUNG BEFORE COMPLETION
*

          ROUTINE CCM        ENTRY / EXIT

          LDM    MACF        ERROR FLAG
          ZJP    CCMX        EXIT IF CLEAR
          LDN    1
          STM    TERT        TERMINATE CURRENT ACTION LIST
          SETDAC MCHP        NEW ACTION LIST
          UJP    CCMX        EXIT

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (CREATE FAULT SYMPTOM CODE)
 GIE      SPACE  4,10
**        GIE - GENERATE INTERNAL ERROR FSC.
*
*         ENTRY  4XX, 5XX AND 6XX CODES ARE HANDLED.


          ROUTINE GIE

          LDDL   BC+BCDA
          LMC    0#240A
          NJN    GIE1        IF NOT SPECIAL 40A ANALYSIS
          LDM    CPUO
          STD    T1
          LDML   GSCA,T1
          UJN    GIE2        WRITE FAULT SYMPTOM CODE

 GIE1     LDM    IOUM
          STD    MD
          LDC    2RDI        IOU ELEMENT IDENTIFIER
          ADM    IOUN        NUMBER OF CURRENT IOU (LOWER 12-BITS ONLY)
 GIE2     RJM    WFC         WRITE FAULT SYMPTOM
          LJM    GIEX        RETURN
 WFC      SPACE  4,10
**        WFC - WRITE FAULT SYMPTOM CODE.
*
*         ENTRY  (A) = TWO CHARACTER ELEMENT IDENTIFIER.
*                (BC - BC+3) = BUFFER CONTROL WORD.
*                (RTP1) = 0 LOG TO SUPPORTIVE STATUS
*                       = 1 LOG TO NON REGISTER STATUS
*         USES   T1, CM - CM+3.
*
*         CALLS  CDA, CSD, IDA.


 WFC      SUBR               ENTRY/EXIT
          STDL   T1          SAVE ELEMENT IDENTIFIER
          LDN    3
          STM    WFCC        NUMBER OF HEADER WORDS FOR SUPPORTIVE STATUS
          LDM    RTP1        FLAG TO LOG TO SUPPORTIVE STATUS OR NON REGISTER STATUS
          ZJN    WFC1        IF TO LOG TO SUPPORTIVE STATUS
          AOM    WFCC        NON REGISTER STATUS HAS 1 MORE HEADER WORD THAN SUPPORTIVE
          LDN    NRSP        ADDRESS OF SCRATCH NON REGISTER STATUS BUFFER
          UJN    WFC2

*         READ FIRST WORD OF FAULT SYMPTOM CODE TO PRESERVE FIRST TWO BYTES.

 WFC1     LDN    SSBP        GET ADDRESS OF SCRATCH BUFFER
 WFC2     RJM    IDA
          CRDL   CM
          LDM    WFCC        SKIP HEADER WORDS
          RADL   CM
          LRD    CM+1
          ADC    RR
          CRML   WFCA,ON
          LDDL   T1          SET ELEMENT IDENTIFIER
          STML   WFCB

*         SET MODEL NUMBER.

          LDD    MD
          RJM    CDA         CONVERT TWO DIGITS TO ASCII
          STML   WFCB+1

*         SET SYMPTOM CODE.

          LDDL   BC+BCDA     DFT ANALYSIS
          SHN    -10
          LPN    0#F
          STD    T1
          LMN    4           4XX INTERNAL ERROR
          ZJN    WFC2.5      IF INTERNAL ERROR
          LDD    T1
          LMN    5           5XX INTERNAL ERROR
          ZJN    WFC2.5      IF INTERNAL ERROR
          LDD    T1
          LMN    6           6XX CODE
          ZJN    WFC2.5      IF INTERNAL ERROR
          UJN    WFC3

 WFC2.5   LDML   WFCB+2
          LPC    0#FF00
          STML   WFCB+2
          LDDL   BC+BCDA
          SHN    -10
          LPN    0#F
          RJM    CSD         CONVERT SINGLE DIGIT
          LMML   WFCB+2
          STML   WFCB+2
          LDDL   BC+BCDA
          LPC    0#FF
          RJM    CDA         CONVERT DIGITS TO ASCII
          STML   WFCB+3
          UJP    WFC4

 WFC3     LDDL   BC+BCDA     DFT ANALYSIS
          SHN    -4          ISOLATE FIRST TWO CHARACTERS
          LPC    377
          RJM    CDA         CONVERT TWO DIGITS TO ASCII
          STML   WFCB+2
          LDD    BC+BCDA     ISOLATE LAST CHARACTER
          LPN    17
          RJM    CSD         CONVERT SINGLE DIGIT TO ASCII
          SHN    10
          LMC    1R
          STML   WFCB+3

*         WRITE FAULT SYMPTOM CODE TO SCRATCH SUPPORTIVE STATUS BUFFER.

 WFC4     LDN    2           SET NUMBER OF CM WORDS TO WRITE
          STD    T1
          LDDL   CM          LOAD ADDRESS OF SCRATCH BUFFER
          ADC    RR
          CWML   WFCA,T1     WRITE TO SCRATCH BUFFER
          LJM    WFCX        RETURN

 WFCC     BSS    1
 WFCA     BSS    2           RESERVED AREA OF FAULT SYMPTOM CODE
 WFCB     DATA   12HDEMMZCC
 AFF      SPACE  4,10
**        AFF - ANALYSE FIRST FAILURE CAPTURE DATA
*
*         USES   T1-T6, CM.
*
*         MACROS USED   READMR
*
*         CALLS  RPM, FMB, AFD, FFB.
*
*         EXITS  (FSAC) = FAULT SYMPTOM ANALYSIS CODE

          ROUTINE AFF
          LDC    DEMR        DEC REGISTER
          STD    RN
          CALL   RPM         READ REGISTER
          LDM    MACF        ERROR FLAG
          ZJN    AFF0        IF NO ERROR
          LDN    1
          STM    TERT        TERMINATE CURRENT ACTION LIST
          SETDAC MCHI
          UJP    AFFX        EXIT
 AFF0     LDN    0
          STM    FLAG1
          STM    FLAG2
          STD    T1
          LDML   RDATA+4
          LPC    M3401
          ZJP    AFF9        FIRST FAILURE CAPTURE NOT ENABLED
          LDC    PPFS+7
          RJM    FMB         READ PFS REGISTER 87
          CRDL   CM
          LDDL   CM+1
          LPC    M1905
          ZJP    AFF10       NO BITS SET IN REG 87 (BITS 19-23)
          SHN    5
          UJN    AFF2

 AFF1     SHN    1           POSITION BIT
 AFF2     PJN    AFF3        IF BIT NOT SET
          SHN    1           REMOVE SET BIT
          LPC    0#3F800     ONLY KEEP UPPER BITS
          NJP    AFF8        IF MULTIPLE BITS SET
          LDM    AFFA,T1     LOAD BIT BEING ANALYZED
          STM    AFFE        SAVE
          LDM    AFFB,T1
          STD    T3          SAVE PFS REGISTER TO ANALYZE
          LDM    AFFD,T1
          STD    T4          SAVE INDEX TO MASK TABLE
          LDM    AFFF,T1
          STD    T6          SAVE INDEX TO MASK TABLE
          LDM    AFFC,T1
          STD    T1          SAVE LENGTH FOR FRU LISTS
          RJM    AFD         GO ANALYZE FAILURE DATA
          UJN    AFF4        CONTINUE

 AFF3     STDL   T2          SAVE POSITION OF BITS
          SHN    -2          SAVE BITS 17/18
          LPC    0#C000
          STDL   T5
          AOD    T1          BUMP COUNT OF BITS
          ADC    -5
          ZJP    AFFX        FINISHED
          LDDL   T5          BITS 17/18
          SHN    2
          RADL   T2          BITS 0-16
          UJP    AFF1        GO CHECK NEXT BIT

 AFF4     LDM    FLAG1
          ADM    FLAG2
          ZJN    AFF7        BOTH FLAGS ZERO
          SBN    1
          ZJN    AFF6
          SBN    1
          ZJN    AFF5
          UJN    AFF6
 AFF5     LDD    T3          PFS REGISTER NO
          SHN    8D          POSITION
          STML   FSAC        SAVE
          RJM    FFB         FIND FAILING BIT
          RAML   FSAC        SAVE
          UJP    AFFX

 AFF6     LDD    T3          PFS REGISTER NO
          SHN    8D          POSITION
          STML   FSAC        SAVE
          LDC    0#FF        CODE
          RAML   FSAC        SAVE
          UJP    AFFX

 AFF7     LDC    PPFS+7
          SHN    8D          POSITION
          STML   FSAC        SAVE
          LDM    AFFE        BIT ANALYZED
          RJM    CTD         CONVERT TO DECIMAL
          RAML   FSAC        SAVE
          UJP    AFFX        EXIT

 AFF8     LDC    PPFS+7
          SHN    8D          POSITION
          STML   FSAC        SAVE
          LDC    0#FF        CODE
          RAML   FSAC        SAVE
          UJP    AFFX        EXIT

 AFF9     LDC    0#FFFF      CODE FOR FFC DISABLED
          STML   FSAC
          UJP    AFFX        EXIT

 AFF10    LDC    PPFS+7      CODE 8700 FOR NOT BITS SET
          SHN    8D          POSITION 87
          STML   FSAC
          UJP    AFFX        EXIT

 AFFA     BSS    0           FIRST FAILURE CAPTURE BITS IN PFS 87
          CON    19D
          CON    20D
          CON    21D
          CON    22D
          CON    23D

 AFFB     BSS    0           FIRST FAILURE CAPTURE GROUPS
          CON    PPFS
          CON    PPFS+2
          CON    PPFS+4
          CON    PPFS+6
          CON    PPFS+8D

 AFFC     BSS    0           LENGTH OF MASK WORDS
          CON    60D
          CON    104D
          CON    140D
          CON    160D
          CON    176D

 AFFD     BSS    0           INDEX TO MASK TABLE
          CON    0
          CON    60D
          CON    104D
          CON    140D
          CON    160D

 AFFE     CON    0           FAILING BIT

 AFFF     BSS    0           INDEX TO MASK TABLE
          CON    0
          CON    8D
          CON    16D
          CON    24D
          CON    32D
          EJECT
**        AFD - ANALYSIS FAILURE DATA
*
*         ENTRY  T3 = PFS REGISTER TO READ
*                T1 = LENGTH OF FRU LIST DATA
*                T4 = OFFSET TO MASK TABLE
*                T6 = INDEX TO MASK TABLE
*
*         USES   T1-T7, CM.
*
*         EXIT   T3 = PFS WITH FAILING BIT
*                FLAG1/FLAG2 = FAILURE CODES
*                   0 = NO BITS SET
*                   1 = MULTIPLE BITS SET
*                   2 = ISOLATED TO FRU LIST

 AFD      SUBR               ENTRY/EXIT
          LDD    T4          OFFSET TO MASK TABLE
          STD    T5          SAVE
          STD    T7          SAVE
          LDN    0
          STD    T2
          STM    FLAG1       CLEAR FLAGS
          STM    FLAG2
 AFD1     LDDL   T3          PFS REGISTER TO READ
          RJM    FMB
          CRDL   CM          READ PFS REGISTER
 AFD2     LDML   CM,T2
          LPML   AFDD,T6     MASK OFF UNNECESSARY BITS
          STML   CM,T2
          AOD    T6
          AOD    T2
          SBN    4
          NJN    AFD2        DO FOR 4 PP WORDS
          LDN    0
          STD    T2
 AFD3     LDML   CM,T2       READ PFS DATA
          LPML   AFDB,T4     MASK INTERESTING BITS
          NJP    AFD6        BIT SET - CONTINUE
          AOD    T4
          AOD    T2
          SBN    4
          NJN    AFD3        CHECK ENTIRE PFS DATA
          LDN    0
          STD    T2
          LDDL   T5
          ADN    4
          STDL   T5
          STDL   T4
          SBDL   T1
          NJP    AFD3        TRY NEXT FRU LIST INFORMATION
          LDN    0
          STM    FLAG1       1ST PFS REG HAS NO BITS SET
          LDDL   T7
          STDL   T4          RESET FRU LIST INDEX
          STDL   T5
          AODL   T3          BUMP TO 2ND PFS REG IN SET
          RJM    FMB
          CRDL   CM          READ NEXT PFS REGISTER
 AFD4     LDML   CM,T2
          LPML   AFDD,T6     MASK OFF UNNECESSARY BITS
          STML   CM,T2
          AOD    T6
          AOD    T2
          SBN    4
          NJN    AFD4        DO FOR 4 PP WORDS
          LDN    0
          STD    T2
 AFD5     LDML   CM,T2       READ PFS DATA
          LPML   AFDC,T4     MASK INTERESTING BITS
          NJP    AFD12       BIT SET - CONTINUE
          AOD    T4
          AOD    T2
          SBN    4
          NJN    AFD5        CHECK ENTIRE PFS DATA
          LDN    0
          STD    T2
          LDDL   T4
          SBDL   T1
          NJP    AFD5        TRY NEXT FRU LIST INFORMATION
          LDN    0
          STM    FLAG2       2ND PFS REG HAS NO BITS SET
          UJP    AFDX        EXIT - FLAG1/FLAG2 = 0

 AFD6     LDN    0
          STD    T2          RESET PFS READ INDEX
          LDD    T5
          STD    T4          RESET MASK INDEX
 AFD7     LDML   AFDB,T4     SET IF ANY OTHER BIT NOT IN THIS
          LMC    0#FFFF         FRU LIST IS SET
          LPML   CM,T2       CHECK BITS NOT IN THIS FRU LIST
          ZJN    AFD8        NO BIT SET - CONTINUE
          LDN    1
          STM    FLAG1       FLAG 1ST PFS HAV MULTIPLE BITS SET
          UJP    AFDX        EXIT - FLAG 1 = 1, FLAG 2 = 0

 AFD8     AOD    T4
          AOD    T2
          SBN    4
          NJN    AFD7        CHECK ENTIRE PFS WORD
          AODL   T3
          RJM    FMB
          CRDL   CM          READ 2ND PFS IN SET
          LDN    0
          STD    T2
 AFD9     LDML   CM,T2
          LPML   AFDD,T6     MASK OFF UNNECESSARY BITS
          STML   CM,T2
          AOD    T6
          AOD    T2
          SBN    4
          NJN    AFD9        DO FOR 4 PP WORDS
          LDN    0
          STD    T2
          LDDL   T5
          STDL   T4          RESET FRU INDEX
 AFD10    LDML   AFDC,T4     CHECK 2ND PFS FOR BITS NOT
          LMC    0#FFFF          IN THIS FRU LIST SET
          LPML   CM,T2
          ZJN    AFD11       NO BITS SET - CONTINUE CHECK
          LDN    1
          STM    FLAG2       2ND PFS HAS MULTIPLE BITS SET
          UJP    AFDX        EXIT - FLAG1= 2, FLAG2 = 1

 AFD11    AOD    T4
          AOD    T2
          SBN    4
          NJN    AFD10       CHECK ENTIRE PFS DATA
          SOD    T3          RESET PFS TO 1ST OF SET
          LDN    2
          STM    FLAG1       FLAG 1ST PFS GOOD
          UJP    AFDX        EXIT - FLAG1 = 2, FLAG2 = 0

 AFD12    LDN    0
          STD    T2
          LDDL   T5
          STDL   T4          RESET FRU LIST INDEX
 AFD13    LDML   AFDC,T4     CHECK 2ND PFS FOR BITS NOT
          LMC    0#FFFF          IN THIS FRU LIST SET
          LPML   CM,T2
          ZJN    AFD14       NO BITS SET - CONTINUE CHECK
          LDN    1
          STM    FLAG2       2ND PFS HAS MULTIPLE BITS SET
          UJP    AFDX        EXIT - FLAG1= 0, FLAG2 = 1

 AFD14    AOD    T4
          AOD    T2
          SBN    4
          NJN    AFD13       CHECK ENTIRE PFS DATA
          LDN    2
          STM    FLAG2       FLAG 2ND PFS GOOD
          UJP    AFDX        EXIT - FLAG1 = 0, FLAG2 = 2

 FLAG1    CON    0
 FLAG2    CON    0

 AFDB     BSS    0           MASK FOR PFS REGS 80,82,84,86,88
          CON    0#3000
          CON    0#0000
          CON    0#F000
          CON    0#0000
          CON    0#0F00
          CON    0#FFFF
          CON    0#00F7
          CON    0#F801
          CON    0#00FE
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0001
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0C00
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0300
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0008
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0400
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0300
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#00FE
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
*         REGISTER 82
          CON    0#8000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#4000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#3000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0C00
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0300
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#00FF
          CON    0#0000
          CON    0#1FF0
          CON    0#0000
          CON    0#0000
          CON    0#F0FF
          CON    0#000F
          CON    0#E7FD
          CON    0#0000
          CON    0#0F00
          CON    0#E000
          CON    0#1000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0800
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0002
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
*         REGISTER 84
          CON    0#FFFF
          CON    0#FF80
          CON    0#0010
          CON    0#000F
          CON    0#0000
          CON    0#0070
          CON    0#CF1C
          CON    0#0000
          CON    0#0000
          CON    0#000F
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#3000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0080
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
*         REGISTER 86
          CON    0#3FFF
          CON    0#FFFC
          CON    0#FE00
          CON    0#0000
          CON    0#0000
          CON    0#0003
          CON    0#0000
          CON    0#00F0
          CON    0#0000
          CON    0#0000
          CON    0#0100
          CON    0#0000
          CON    0#C000
          CON    0#0000
          CON    0#00FF
          CON    0#FF0F
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
*         REGISTER 88
          CON    0#FFC0
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#003C
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0003
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000

 AFDC     BSS    0           MASKS FOR PFS REG 81,83,85,87,89
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#8FFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#7E00
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#80F0
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0100
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#000F
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#4000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#3000
          CON    0#0000
          CON    0#0000
*         PFS REGISTER 83
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#4000
          CON    0#0000
          CON    0#0000
          CON    0#FF00
          CON    0#9FFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#00FF
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#2000
          CON    0#0000
          CON    0#0000
*         PFS REGISTER 85
          CON    0#0007
          CON    0#8FFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#4000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#2000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#1000
          CON    0#0000
          CON    0#0000
          CON    0#FFF8
          CON    0#0000
          CON    0#0000
          CON    0#0000
*         PFS REGISTER 87
          CON    0#0000
          CON    0#4000
          CON    0#0000
          CON    0#0000
          CON    0#00F0
          CON    0#0400
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#FF0F
          CON    0#82FF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#0000
          CON    0#2000
          CON    0#0000
          CON    0#0000
*         PFS REGISTER 89
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#0000
          CON    0#FFFF
          CON    0#9FFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#0000
          CON    0#6000
          CON    0#0000
          CON    0#0000

 AFDD     BSS    0           MASKS TO IGNORE UNNECESSARY BITS
          CON    0#3FFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FF9C
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#C0FF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          CON    0#FFFF
          EJECT
**        FFB - FIND FAILING BIT
*
*         ENTRY  T3 = PFS REGISTER TO READ (80-89)
*
*         USES   T2-T4, CM.
*
*         CALLS  CTD
*
*         EXIT   T3 = PFS WITH FAILING BIT
*                (A) = FAILING BIT NUMBER IN DECIMAL
*                FLAG1/FLAG2 = FAILURE CODES

 FFB      SUBR               ENTRY/EXIT
          LDD    T3
          RJM    FMB         GET R-REGISTER POINTER
          CRDL   CM          READ TO CM
          LDDL   T3          PFS REGISTER
          LPN    17          SAVE BOTTOM 4 BITS
          SHN    2           MULTIPLY BY 4
          STD    T3          SAVE RESULT
          LDN    0           CLEAR INDEX
          STD    T4
 FFB0     LDML   CM,T4
          LPML   AFDD,T3     MASK OFF UNINTERESTING BITS
          STML   CM,T4       AND SAVE
          AOD    T3
          AOD    T4
          SBN    4
          NJN    FFB0        DO 4 PP WORDS
          LDN    0
          STD    T4          CLEAR INDEX
 FFB1     LDN    0
          STD    T2
          LDML   CM,T4       READ PART OF PFS
          SHN    1           POSITION FOR LOOP
          STML   FFBA+1      SAVE
          SHN    -2          SAVE BITS 17/18
          LPC    0#C000
          STML   FFBA
 FFB2     LDML   FFBA        LOAD DATA
          SHN    2           POSITION BITS 17/18
          RAML   FFBA+1
          SHN    1
          MJN    FFB3        IF BIT SET
          STML   FFBA+1      SAVE
          SHN    -2          SAVE BITS 17/18
          LPC    0#C000
          STML   FFBA
          AOD    T2          ELSE INCREMENT BIT COUNTER
          SBN    16
          NJN    FFB2        CONTINUE SEARCHING
          AOD    T4
          SBN    4
          NJN    FFB1        CHECK 4 WORDS
 FFB3     LDML   FFBB,T4
          ADD    T2          ADD OFFSET TO BIT COUNT
          RJM    CTD         CONVERT NUMBER TO DECIMAL
          UJP    FFBX

 FFBA     CON    0,0         TEMPORARY STORAGE
 FFBB     BSS    0           TABLE OF BIT OFFSETS
          CON    0
          CON    16D
          CON    32D
          CON    48D
          EJECT
**        CTD - CONVERT TO DECIMAL
*
*         ENTRY  (A) = TWO DIGIT OCTAL NUMBER TO CONVERT
*
*         USES   T3-T4.
*
*         EXIT   (A) = NUMBER IN DECIMAL

 CTD      SUBR               ENTRY/EXIT
          LPN    77B         KEEP ONLY 6 BITS
          STDL   T3          SAVE NUMBER
          LDN    0
          STDL   T4          CLEAR RESULT
 CTD1     LDDL   T3          LOAD NUMBER
          SBN    10D         SUBTRACT 10
          MJN    CTD2        IF NUMBER LESS THAN 10
          STDL   T3          SAVE DIFFERENCE
          LDN    16D         INCREMENTER
          RADL   T4          INCREMENT 10'S COUNTER
          UJN    CTD1        CONTINUE
 CTD2     LDDL   T3          LOAD REMAINDER
          RADL   T4          ADD TO 10'S COUNTER
          UJP    CTDX        RETURN

          EJECT
*
*         THIS CODE CONTAINS ROUTINES TO GENERATE AN IOU, CM
*         OR PROCESSOR FAULT SYMPTOM CODE AND STORE IT IN THE
*         SCRATCH SUPPORTIVE STATUS BUFFER.
 GSB      SPACE  4,10
**        GSB - GENERATE FAULT SYMPTOM CODE CONTAINING BLANKS.
*
*         USES   T1, CM - CM+3.
*
*         CALLS  IDA.


          ROUTINE  GSB

*         WRITE BLANK FAULT SYMPTOM CODE TO SCRATCH SUPPORTIVE STATUS BUFFER.

          LDN    2           SET NUMBER OF CM WORDS TO WRITE
          STD    T1
          LDN    SSBP        GET ADDRESS OF SCRATCH BUFFER
          RJM    IDA
          CRDL   CM
          LDN    3           SKIP HEADER WORDS
          RADL   CM
          LRD    CM+1
          ADC    RR
          CWML   GSBA,T1     WRITE TO SCRATCH BUFFER
          LJM    GSBX        RETURN

 GSBA     CON    0,0         RESERVED AREA OF FAULT SYMPTOM CODE
          DATA   C*            *
 GSC      SPACE  4,10
**        GSC - GENERATE FAULT SYMPTOM CODE FOR (CPU) PROCESSOR .
*
*         CALLS  WFC.
*
*         USES   T1.


          ROUTINE  GSC
          LDDL   BC+BCDA     GET THE ANALYSIS TO BE LOGGED
          SHN    -BC.ANP
          SBN    EPEN
          MJN    GSC1        IF NOT AN ENVIRONMENT OR LONG WARNING
          LDM    CPUO
          STD    T1
          LDML   GSCA,T1
          RJM    WFC         WRITE THE FAULT CODE
          LJM    GSCX        RETURN

 GSC1     LDM    CPUO        CPU OFFSET
          STD    T1
          LDML   GSCA,T1     GET PROCESSOR ELEMENT ID
          RJM    WPF         WRITE PROCESSOR FAULT SYMPTOM CODE
          LJM    GSCX        RETURN

 GSCA     BSS    0
          CON    2RDC        PROCESSOR 0
          CON    2RDD        PROCESSOR 1
          CON    2RDE        PROCESSOR 2
          CON    2RDF        PROCESSOR 3
          CON    2RDR        PROCESSOR 4
          CON    2RDS        PROCESSOR 5
          CON    2RDT        PROCESSOR 6
          CON    2RDU        PROCESSOR 7

 GSP      SPACE  4,10
**        GSP - GENERATE FAULT SYMPTOM CODE FOR PAGE MAP.
*         PAGE MAP IS VALID ONLY ON AN S0.  THEREFORE, THIS ROUTINE
*         GENERATES AN ERROR.
*
*         EXIT   TO *ERRH*.


          ROUTINE  GSP
          LDC    DAIE        624 - DFT INTERNAL ERROR
          STML   RTP1
          CALL   ERRH
 WPF      SPACE  4,10
**        WPF - WRITE PROCESSOR FAULT SYMPTOM CODE.
*
*         ENTRY  (A) = TWO CHARACTER ELEMENT IDENTIFIER.
*
*         USES   T1, CM - CM+3.
*
*         CALLS  CDA, IDA.


 WPF      SUBR               ENTRY/EXIT
          STML   WFCB        STORE ELEMENT IDENTIFIER

*         SET MODEL NUMBER.

          LDD    MD
          RJM    CDA         CONVERT TWO DIGITS TO ASCII
          STML   WFCB+1

*         SET SYMPTOM CODE.

          LDML   FSAC        FAULT SYMPTOM ANALYSIS CODE
          STD    CM
          SHN    -8D         ISOLATE FIRST TWO CHARACTERS
          LPC    377
          RJM    CDA         CONVERT TWO DIGITS TO ASCII
          STML   WFCB+2
          LDD    CM          ISOLATE LAST CHARACTER
          LPC    377
          RJM    CDA         CONVERT TWO DIGITS TO ASCII
          STML   WFCB+3

*         WRITE FAULT SYMPTOM CODE TO SCRATCH SUPPORTIVE STATUS BUFFER.

          LDN    2           SET NUMBER OF CM WORDS TO WRITE
          STD    T1
          LDN    SSBP        GET ADDRESS OF SCRATCH BUFFER
          RJM    IDA
          CRDL   CM
          LDN    3           SKIP HEADER WORDS
          RADL   CM
          LRD    CM+1
          ADC    RR
          CWML   WFCA,T1     WRITE TO SCRATCH BUFFER
          LJM    WPFX        RETURN
          SPACE  4,10
 GSI      SPACE  4,10
**        GSI - GENERATE FAULT SYMPTOM CODE FOR IOU.
*
*         THE ELEMENT IDENTIFIER USED IN THE FAULT SYMPTOM CODE DEPENDS ON
*         THE IOU ORDINAL:
*                I - IOU 0.
*                J - IOU 1.
*                K - IOU 2.
*                L - IOU 3.
*
*         CALLS  WFC.
 GSI      SPACE  4,10
**        GSI - GENERATE FAULT SYMPTOM CODE FOR IOU.
*
*         CALLS  WFC, *I4A*, *I4I*, *I4S*.


          ROUTINE  GSI

          LDDL   MD
          LMC    0#43
          ZJP    GSI4        IF MODEL 43 IOU
          LMN    0#44&0#43
          NJN    GSI1        IF NOT MODEL 44
          CALL   I4I         INTERFACE TO MODEL 44 IOU FSC COMMON DECK
 GSI0     LJM    GSIX        RETURN

 GSI1     LDDL   MD
          LMC    0#42
          NJN    GSI2        IF NOT MODEL 42 IOU
          CALL   I4S
          UJN    GSI0

 GSI2     LDDL   MD
          LMC    0#40
          NJN    GSI3        IF NOT MODEL 40 IOU
          CALL   I4A
          UJN    GSI0

 GSI3     LDC    2RDI        IOU ELEMENT IDENTIFIER
          RJM    WFC         WRITE FAULT SYMPTOM CODE
          LJM    GSIX        RETURN

 GSI4     CALL   I43
          UJN    GSI0

*copy     ctp$convert_digits_to_ascii
*copy     ctp$dft_write_fsc_to_buffer
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (GENERATE CM FAULT CODE)
*COPY     CTP$DFT_GENERATE_960_MEMORY_FSC
*copy     ctp$convert_digits_to_ascii
*copy     ctp$dft_write_fsc_to_buffer

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (IOU MODEL 44 FSC DECK)
 I4I      SPACE  4,10
**        I4I - INTERFACE TO I4C FSC COMMON DECK.
*
*         CALLS  GS4.


          ROUTINE  I4I

          LDDL   BC+BCDA     GET ANALYSIS TO LOG
          SHN    -BC.ANP
          SBN    EPEN
          PJP    I4I2        IF ENVIRONMENT WARNING
          LDML   CPU0M       CPU0 MODEL NUMBER
          STML   CDIF
          LDC    IFS1
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+1,ON
          LDC    IFS2
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+5,ON
          LDC    CDIF        FWA OF INTERFACE BUFFER
          RJM    /IOUFLT4/IOUFLT4
 I4I1     LDC    2RDI        IOU ELEMENT IDENTIFIER
          ADM    IOUO        INCREMENT BY IOU ORDINAL
          RJM    WFS         WRITE FAULT SYMPTOM CODE TO SUPPORTIVE STATUS
          UJP    I4IX        RETURN

 I4I2     LDN    3
          STD    T1
 I4I3     LDML   I4IA,T1     GET CANNED ENVIRONMENT FAULT SYMPTOM CODE
          STML   CDIF,T1     STORE IN OUTPUT BUFFER
          SOD    T1
          PJN    I4I3        IF NOT DONE
          UJN    I4I1        LOG THE FAULT CODE

 I4IA     DATA   H*701     *
*COPY     CTP$DFT_MODEL_44_IOU_FSC
*copy     ctp$convert_digits_to_ascii
*copy     ctp$dft_generate_i4c_codes
*copy     ctp$dft_write_fsc_to_buffer
          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (IOU MODEL 43 FSC DECK)
 I43      SPACE  4,10
**        I43 - INTERFACE TO I43 FSC COMMON DECK.
*
*         CALLS  GS4.


          ROUTINE  I43

          LDDL   BC+BCDA     GET ANALYSIS TO LOG
          SHN    -BC.ANP
          SBN    EPEN
          PJP    I432        IF ENVIRONMENT WARNING
          LDML   CPU0M       CPU0 MODEL NUMBER
          STML   CDIF
          LDC    IFS1
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+1,ON
          LDC    IFS2
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+5,ON
          LDC    CDIF        FWA OF INTERFACE BUFFER
          RJM    IOU43       !!!DON THIS NEEDS A CHANGE !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
 I431     LDC    2RDI        IOU ELEMENT IDENTIFIER
          ADM    IOUO        INCREMENT BY IOU ORDINAL
          RJM    WFS         WRITE FAULT SYMPTOM CODE TO SUPPORTIVE STATUS
          UJP    I43X        RETURN

 I432     LDN    3
          STD    T1
 I433     LDML   I43A,T1     GET CANNED ENVIRONMENT FAULT SYMPTOM CODE
          STML   CDIF,T1     STORE IN OUTPUT BUFFER
          SOD    T1
          PJN    I433        IF NOT DONE
          UJN    I431        LOG THE FAULT CODE

 I43A     DATA   H*701     *

*         DON THE NEW COMMON DECK WILL GO HERE  *
                                                *
 IOU43    SUBR               REMOVE THIS!       *
          UJN    IOU43X      AND THIS!          *

*copy     ctp$convert_digits_to_ascii
*copy     ctp$dft_generate_i4c_codes
*copy     ctp$dft_write_fsc_to_buffer
          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY (GENERATE IOU MODEL 40 FSC)

 I4A      SPACE  4,10
**        I4A - INTERFACE TO I4A FSC COMMON DECK.
*


          ROUTINE  I4A

          LDDL   BC+BCDA     GET ANALYSIS TO LOG
          SHN    -BC.ANP
          SBN    EPEN
          PJP    I4A2        IF ENVIRONMENT WARNING
          LDML   CPU0M       CPU0 MODEL NUMBER
          STML   CDIF
          LDC    IFS1
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+1,ON
          LDC    IFS2
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+5,ON
          LDN    OIMR
          RJM    FMB         FIND REGISTER IN MAINTENANCE REGISTER SCRATCH
          CRDL   W0
          LDDL   W3
          SHN    21-7
          PJN    I4A0        IF NO CIO PPS PRESENT
          LDC    CIFS1
          RJM    FMB         FIND REGISTER IN MAINTENANCE REGISTER SCRATCH
          CRML   CDIF+9D,ON
          LDC    CIFS2
          RJM    FMB         FIND REGISTER IN MAINTENANCE REGISTER SCRATCH
          CRML   CDIF+13D,ON
 I4A0     LDC    CDIF        FWA OF INTERFACE BUFFER
          RJM    /IOUFLT0/IOUFLT0
 I4A1     LDC    2RDI        IOU ELEMENT IDENTIFIER
          ADM    IOUO        INCREMENT BY IOU ORDINAL
          RJM    WFS         WRITE FAULT SYMPTOM CODE TO SUPPORTIVE STATUS
          UJP    I4AX        RETURN

 I4A2     LDN    3
          STD    T1
 I4A3     LDML   I4AA,T1     GET CANNED ENVIRONMENT FAULT SYMPTOM CODE
          STML   CDIF,T1     STORE IN OUTPUT BUFFER
          SOD    T1
          PJN    I4A3        IF NOT DONE
          UJN    I4A1        LOG THE FAULT CODE

 I4AA     DATA   H*701     *


*copy     ctp$convert_digits_to_ascii
*copy     ctp$dft_generate_i4c_codes
*copy     ctp$dft_model_40_iou_fsc
*copy     ctp$dft_write_fsc_to_buffer

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY (GENERATE IOU MODEL 42 FSC)
 I4S      SPACE  4,10
**        I4S - INTERFACE TO I4S FSC COMMON DECK.
*
*         CALLS  GS4.


          ROUTINE  I4S

          LDDL   BC+BCDA     GET ANALYSIS TO LOG
          SHN    -BC.ANP
          SBN    EPEN
          PJP    I4S2        IF ENVIRONMENT WARNING
          LDML   CPU0M       CPU0 MODEL NUMBER
          STML   CDIF
          LDC    IFS1
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+1,ON
          LDC    IFS2
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+5,ON
          LDC    CDIF
          RJM    /IOUFLT2/IOUFLT2
 I4S1     LDC    2RDI        IOU ELEMENT IDENTIFIER
          ADM    IOUO        INCREMENT BY IOU ORDINAL
          RJM    WFS         WRITE FAULT SYMPTOM CODE TO SUPPORTIVE STATUS
          LJM    I4SX        RETURN

 I4S2     LDN    3
          STD    T1
 I4S3     LDML   I4SA,T1     GET CANNED ENVIRONMENT FAULT SYMPTOM CODE
          STML   CDIF,T1     STORE IN OUTPUT BUFFER
          SOD    T1
          PJN    I4S3        IF NOT DONE
          UJN    I4S1        LOG THE FAULT CODE

 I4SA     DATA   H*701     *

          QUAL   IOUFLT2
          COMMENT IOUFLT2 - IOU FAULT SYMPTOM CODE DECK *REL. LEVEL 780*
          COMMENT COPYRIGHT CONTROL DATA SYSTEMS INC. 1992
BITS      TITLE  IOU FAULT SYMPTOM CODE COMMON DECK
**        BITS - FAULT STATUS 1 TABLE MACRO
*
          PURGMAC  BITS
BITS      MACRO  BIT1,BIT2
+         VFD    16/BIT1,16/BIT2
BITS      ENDM
EQUATES   TITLE  IOUFLT2 COMMON DECK EQUATES
*         EQUATES FOR FAULT SYMPTOM CODES THAT DO NOT REQUIRE THE USE
*         OF THE CLUSTER CODE (A, B, C OR D).

CODE05    EQU    2R05        EQUATE FOR FAULT SYMPTOM CODE 05
CODE10    EQU    2R10        EQUATE FOR FAULT SYMPTOM CODE 10
CODE11    EQU    2R11        EQUATE FOR FAULT SYMPTOM CODE 11
CODE12    EQU    2R12        EQUATE FOR FAULT SYMPTOM CODE 12
CODE17    EQU    2R17        EQUATE FOR FAULT SYMPTOM CODE 17
CODE18    EQU    2R18        EQUATE FOR FAULT SYMPTOM CODE 18
CODE19    EQU    2R19        EQUATE FOR FAULT SYMPTOM CODE 19
CODE20    EQU    2R20        EQUATE FOR FAULT SYMPTOM CODE 20
CODE21    EQU    2R21        EQUATE FOR FAULT SYMPTOM CODE 21
CODE24    EQU    2R24        EQUATE FOR FAULT SYMPTOM CODE 24
CODE26    EQU    2R26        EQUATE FOR FAULT SYMPTOM CODE 26
CODE27    EQU    2R27        EQUATE FOR FAULT SYMPTOM CODE 27
CODE29    EQU    2R29        EQUATE FOR FAULT SYMPTOM CODE 29
CODE31    EQU    2R31        EQUATE FOR FAULT SYMPTOM CODE 31
CODE33    EQU    2R33        EQUATE FOR FAULT SYMPTOM CODE 33
CODE37    EQU    2R37        EQUATE FOR FAULT SYMPTOM CODE 37
CODE38    EQU    2R38        EQUATE FOR FAULT SYMPTOM CODE 38
CODE39    EQU    2R39        EQUATE FOR FAULT SYMPTOM CODE 39
CODE40    EQU    2R40        EQUATE FOR FAULT SYMPTOM CODE 40
CODE41    EQU    2R41        EQUATE FOR FAULT SYMPTOM CODE 41
CODE42    EQU    2R42        EQUATE FOR FAULT SYMPTOM CODE 42
CODE43    EQU    2R43        EQUATE FOR FAULT SYMPTOM CODE 43
CODE44    EQU    2R44        EQUATE FOR FAULT SYMPTOM CODE 44
CODE47    EQU    2R47        EQUATE FOR FAULT SYMPTOM CODE 47
CODE49    EQU    2R49        EQUATE FOR FAULT SYMPTOM CODE 49


*         EQUATES FOR FAULT SYMPTOM CODES THAT END WITH A 0 OR 1
*         FOLLOWING THE CLUSTER CODE (A, B, C OR D) INDICATING THAT
*         BITS 49, AND/OR 50, AND/OR 51 WERE SET OR CLEAR.

CODE22    EQU    2R22        EQUATE FOR FAULT SYMPTOM CODE 22
CODE23    EQU    2R23        EQUATE FOR FAULT SYMPTOM CODE 23
CODE28    EQU    2R28        EQUATE FOR FAULT SYMPTOM CODE 28
CODE30    EQU    2R30        EQUATE FOR FAULT SYMPTOM CODE 30
CODE32    EQU    2R32        EQUATE FOR FAULT SYMPTOM CODE 32
CODE34    EQU    2R34        EQUATE FOR FAULT SYMPTOM CODE 34


*         EQUATES FOR FAULT STATUS BYTE 4 (BITS 32-39).

BT32      EQU    0#8000      FAULT STATUS BIT 32 EQUATE
BT33      EQU    0#4000      FAULT STATUS BIT 33 EQUATE
BT34      EQU    0#2000      FAULT STATUS BIT 34 EQUATE
BT35      EQU    0#1000      FAULT STATUS BIT 35 EQUATE
BT36      EQU    0#0800      FAULT STATUS BIT 36 EQUATE
BT37      EQU    0#0400      FAULT STATUS BIT 37 EQUATE
BT38      EQU    0#0200      FAULT STATUS BIT 38 EQUATE
BT39      EQU    0#0100      FAULT STATUS BIT 39 EQUATE

          EJECT
*         EQUATES FOR FAULT STATUS BYTE 5 (BITS 40-47).

BT40      EQU    0#0080      FAULT STATUS BIT 40 EQUATE
BT41      EQU    0#0040      FAULT STATUS BIT 41 EQUATE
BT42      EQU    0#0020      FAULT STATUS BIT 42 EQUATE
BT43      EQU    0#0010      FAULT STATUS BIT 43 EQUATE
BT44      EQU    0#0008      FAULT STATUS BIT 44 EQUATE
BT45      EQU    0#0004      FAULT STATUS BIT 45 EQUATE
BT46      EQU    0#0002      FAULT STATUS BIT 46 EQUATE
BT47      EQU    0#0001      FAULT STATUS BIT 47 EQUATE


*         EQUATES FOR FAULT STATUS BYTE 6 (BITS 48-55).

BT48      EQU    0#8000      FAULT STATUS BIT 48 EQUATE
BT49      EQU    0#4000      FAULT STATUS BIT 49 EQUATE
BT50      EQU    0#2000      FAULT STATUS BIT 50 EQUATE
BT51      EQU    0#1000      FAULT STATUS BIT 51 EQUATE
BT52      EQU    0#0800      FAULT STATUS BIT 52 EQUATE
BT53      EQU    0#0400      FAULT STATUS BIT 53 EQUATE
BT54      EQU    0#0200      FAULT STATUS BIT 54 EQUATE
BT55      EQU    0#0100      FAULT STATUS BIT 55 EQUATE


*         EQUATES FOR FAULT STATUS BYTE 7 (BITS 56-63).

BT56      EQU    0#0080      FAULT STATUS BIT 56 EQUATE
BT57      EQU    0#0040      FAULT STATUS BIT 57 EQUATE
BT58      EQU    0#0020      FAULT STATUS BIT 58 EQUATE
BT59      EQU    0#0010      FAULT STATUS BIT 59 EQUATE
BT60      EQU    0#0008      FAULT STATUS BIT 60 EQUATE
BT61      EQU    0#0004      FAULT STATUS BIT 61 EQUATE
BT62      EQU    0#0002      FAULT STATUS BIT 62 EQUATE
BT63      EQU    0#0001      FAULT STATUS BIT 63 EQUATE


*         MISCELLANEOUS EQUATES FOR FAULT STATUS 1 AND FAULT STATUS 2.

FS1MSK2   EQU    0#6000      FS1 MASK FOR BITS 49 AND 50
FS1MSK3   EQU    0#7000      FS1 MASK FOR BITS 49, 50 AND 51
FS1MSK4   EQU    0#080F      FS1 MASK FOR BITS 52 AND 60-63
FS1MSK5   EQU    0#F7F0      FS1 MASK FOR BITS 48-51, 53-59
FS1MSK6   EQU    0#020F      FS1 MASK FOR BITS 54 AND 60-63
FS1MSK7   EQU    0#87FF      FS1 MASK TO CLEAR BITS 49-52
FS1MSK8   EQU    0#0300      FS1 MASK TO CLEAR BITS 54 AND 55
FS2MSK0   EQU    0#FFAF      FS2 MASK FOR BITS 32-47
FS2MSK1   EQU    0#1F9F      FS2 MASK FOR BITS 48-63
IOUFLT2   TITLE  GENERATE IOU FAULT SYMPTOM CODE
IOUFLT2X  LJM    0           IOU FAULT SYMPTOM CODE GENERATION
IOUFLT2   EQU    *-1         ENTRY POINT

*         SAVE FAULT STATUS BUFFER ADDRESS IN -A- ON ENTRY.

          STDL   T1          SAVE FAULT STATUS BUFFER ADDRESS
          ADN    1D
          STDL   T3

*         INITIALIZE TEMPORARY LOCATIONS.

          LDN    0
          STDL   T2          INITIALIZE TABLE INDEX
          STDL   T4
          STDL   T5
          STDL   T6          INITIALIZE FAULT SYMPTOM CODE LOCATIONS
          STDL   T7

*         MOVE FAULT STATUS 1 AND 2 TO THE TEMPORARY STATUS BUFFER

IFC10     LDIL   T3          MOVE FAULT STATUS 1 AND 2 TO BUFFER
          STML   FSBUFR,T4
          AODL   T3          UPDATE SOURCE ADDRESS
          AODL   T4          UPDATE BUFFER INDEX
          SBN    8D          CHECK FOR MOVE COMPLETE
          MJN    IFC10       IF MOVE NOT COMPLETE

*         CHECK FOR PIP3 TYPE OF CPU.

          LDIL   T1          GET CPU IDENTIFIER
          LMC    2R3A        CHECK FOR PIP3 CPU
          NJN    IFC20       IF NOT PIP3 CPU

*         IF PIP3 TYPE OF CPU, CHECK FOR BITS 52, 60, 61, 62 AND 63 SET
*         IN FAULT STATUS 1. IF NOT, CHECK FOR BITS 54,60-63 BEING SET.

          LDML   FS1BY6      GET FS1 BYTES 6 AND 7
          LPC    FS1MSK4     MASK FS1 FOR BITS 52 AND 60-63
          LMC    FS1MSK4     COMPARE FOR BITS 52 AND 60-63 ALL SET
          ZJN    IFC30       IF BITS 52 AND 60-63 ALL SET IN FS1
          LDML   FS1BY6
          LPC    FS1MSK6     MASK FS1 BITS FOR BITS 54 AND 60-63
          LMC    FS1MSK6     COMPARE W/SET BITS 54 AND 60-63
IFC20     NJN    IFC40       IF BITS 54 AND 60-63 NOT ALL SET
          LDC    2RE         GET 2ND PART OF 77E FSC
          LJM    IFC110      GO FORM 77E FSC AND EXIT TO CALLING PROGRAM

*         CLEAR BITS 52, 60, 61, 62 AND 63 IN FAULT STATUS 1.
*         POSSIBLY CLEAR BITS 49-52.

IFC30     LDML   FS1BY6      GET FS1 BYTES 6 AND 7
          LPC    FS1MSK5     CLEAR BITS 52, 60, 61, 62, AND 63
          STML   FS1BY6      REPLACE FS1 BYTES 6 AND 7
          LPC    FS1MSK8     COMPARE W/BITS 54 AND 55
          ZJN    IFC40       IF NEITHER BIT 54 OR 55 SET
          LDML   FS1BY6
          LPC    FS1MSK7     CLEAR FS1 BITS 49-52
          STML   FS1BY6      REPLACE FS1 BYTES 6 AND 7

*         CHECK FAULT STATUS 2 BYTES 4 AND 5 FOR CHANNEL FAULT BITS
*         SET.

IFC40     LDML   FS2BY4      GET FS2 BYTES 4 AND 5
          LPC    FS2MSK0     MASK OFF NOT USED AND NOT AVAILABLE BITS
          STML   FS2BY4      SAVE FAULT STATUS WORD
          LDML   FS2BY6      GET FS2 BYTES 6 AND 7
          LPC    FS2MSK1     MASK OFF NOT USED AND NOT AVAILABLE BITS
          STML   FS2BY6      SAVE FAULT STATUS WORD
          ADML   FS2BY4      INCLUDE FAULT STATUS BYTES 4 AND 5
          NJN    IFC60       IF FAULT STATUS 2 ERROR
IFC50     LJM    IFC150      GO TO CHECK FOR FAULT STATUS 1 ERROR

*         DETERMINE THE BIT(S) WHICH ARE SET IN THE FAULT STATUS 2
*         WORD AND GENERATE THE FAULT SYMPTOM CODE.

IFC60     LDC    FS2BY4      INITIALIZE FAULT STATUS BUFFER INDEX
          STDL   T3
IFC70     LDC    0#8000      INITIALIZE FAULT STATUS BIT MASK
IFC80     STDL   T4
          LPIL   T3          CHECK FOR CHANNEL BIT SET IN FS2
          ZJN    IFC90       IF CHANNEL BIT IS NOT SET IN FS2

*         POSSIBLE CHANNEL FAULT BIT HAS BEEN FOUND, CHECK FOR PREVIOUS
*         CHANNEL FAULT BIT DETECTED.

          LDDL   T6          CHECK FOR PREVIOUS CHANNEL FAULT BIT FOUND
          ADDL   T7
          NJN    IFC100      IF PREVIOUS CHANNEL FAULT BIT FOUND

*         THE POSSIBLE CHANNEL FAULT BIT HAS BEEN FOUND, SAVE THE FAULT
*         SYMPTOM CODE FOR THE CHANNEL FAULT BIT.

          LDDL   T2          BUILD FS2FSCT TABLE INDEX
          SHN    1D
          STDL   T5
          LDML   FS2FSCT,T5  SET FS2 FAULT SYMPTOM CODE
          STDL   T6
          LDML   FS2FSCT+1,T5  SET FS2 FAULT SYMPTOM CODE
          STDL   T7
IFC90     AODL   T2          UPDATE FAULT STATUS 2 TABLE INDEX
          SBN    32D         CHECK FOR ALL CHANNEL BITS CHECKED
          PJN    IFC50       IF ALL CHANN BITS CHECKED - GO CHK FS1
          LDDL   T4          UPDATE FAULT STATUS BIT MASK
          SHN    -1D
          NJN    IFC80       IF FS2 BYTES 4 AND 5 NOT CHECKED
          AODL   T3          UPDATE FAULT STATUS BUFFER INDEX
          UJN    IFC70       GO TO CHECK NEXT FAULT STATUS WORD

*         MORE THAN ONE ONE BIT HAS BEEN FOUND SET IN FAULT STATUS 2,
*         FORCE THE FAULT SYMPTOM CODE TO DI4277A.

IFC100    LDC    2RA         GENERATE THE FAULT SYMPTOM CODE DI4277A
IFC110    STDL   T7
          LDC    2R77        GENERATE THE CHARACTERS 77
          STDL   T6

*         MOVE THE FAULT SYMPTOM CODE TO THE BUFFER THAT CONTAINED THE
*         FAULT STATUS REGISTERS 1 AND 2 ON ENTRY AND EXIT.

IFC120    LDDL   T6          CHECK FOR NO FAULT SYMPTOM CODE
          ADDL   T7
          NJN    IFC130      IF FAULT SYMPTOM CODE
          LDC    2RD         SET THE FAULT SYMPTOM CODE TO 77D
          UJN    IFC110

IFC130    LDDL   T6          MOVE FIRST TWO FSC CHARACTERS TO BUFFER
          STIL   T1
          LDDL   T7          MOVE SECOND TWO FSC CHARACTERS TO BUFFER
          NJN    IFC134      IF LAST TWO FSC CHARACTERS ARE AVAILABLE
          LDC    2R          BLANK FILL LAST TWO FSC CHARACTERS
IFC134    STML   1,T1
          LDC    2R          BLANK FILL REMAINDER OF THE BUFFER
          STML   2,T1
          STML   3,T1
          STML   4,T1
          STML   5,T1
          STML   6,T1
          STML   7,T1
          LDDL   T1          SET (A) REGISTER FOR EXIT
          LJM    IOUFLT2X    EXIT

*         GENERATE THE FAULT SYMPTOM CODE DI4277B.

IFC140    LDC    2RB         GENERATE THE FAULT SYMPTOM CODE DI4277B
          LJM    IFC110      GO TO GENERATE THE CHARACTERS 77

          EJECT
*********************************************************************
*         CHECK FAULT STATUS 1 FOR ANY BITS SET AND IF NONE ARE SET,
*         EXIT.

IFC150    LDML   FS1BY4      CHECK FOR FAULT STATUS 1 ERROR(S)
          ADML   FS1BY6
          NJN    IFC160      IF FS1 ERROR PRESENT
          LJM    IFC120      IF NO FAULT STATUS 1 ERROR

*         DETERMINE THE CLUSTER IN WHICH THE FAILURE WAS DETECTED, IF
*         MORE THAN ONE CLUSTER FAILED, REPORT A FAULT SYMPTOM CODE OF
*         DI4277B.

IFC160    LDML   FS1BY0      CHECK FOR CLUSTER 0 FAILURE
          SHN    -8D
          ZJN    IFC170      IF NOT CLUSTER 0 FAILURE
          LDC    2RA         FORCE CLUSTER INDICATOR TO A
          STDL   T7
IFC170    LDML   FS1BY1      CHECK FOR CLUSTER 1 FAILURE
          LPC    0#1F
          ZJN    IFC190      IF NOT CLUSTER 1 FAILURE
          LDDL   T7          CHECK FOR MORE THAN ONE FAILING CLUSTER
IFC180    NJN    IFC140      IF MORE THAN ONE FAILING CLUSTER
          LDC    2RB         FORCE CLUSTER INDICATOR TO B
          STDL   T7
IFC190    LDML   FS1BY2      CHECK FOR CLUSTER 2 FAILURE
          SHN    -8D
          ZJN    IFC200      IF NOT CLUSTER 2 FAILURE
          LDDL   T7          CHECK FOR MORE THAN ONE FAILING CLUSTER
          NJN    IFC180      IF MORE THAN ONE FAILING CLUSTER
          LDC    2RC         FORCE CLUSTER INDICATOR TO C
          STDL   T7
IFC200    LDML   FS1BY3      CHECK FOR CLUSTER 3 FAILURE
          LPC    0#1F
          ZJN    IFC210      IF NOT CLUSTER 3 FAILURE
          LDDL   T7          CHECK FOR MORE THAN ONE FAILING CLUSTER
          NJN    IFC180      IF MORE THAN ONE FAILING CLUSTER
          LDC    2RD         FORCE CLUSTER INDICATOR TO D
          STDL   T7

*         CHECK THE FAULT STATUS 1 REGISTER FOR ERRORS.  THE FS1BTB
*         TABLE CONTAINS THE FAULT STATUS 1 BITS 32-63 THAT ARE TO BE
*         CHECKED.

IFC210    BSS    0
          LDN    0           INITIALIZE THE FS1BTB TABLE INDEX
          STDL   T2
IFC220    LDML   FS1BY4      GET FAULT STATUS 1 BYTES 4 AND 5
          LPML   FS1BTB,T2
          LMML   FS1BTB,T2   COMPARE FOR ALL SELECTED BITS SET
          NJN    IFC230      IF ALL SELECTED BITS NOT SET IN FS1
          LDML   FS1BY6      GET FAULT STATUS 1 BYTES 6 AND 7
          LPML   FS1BTB+1,T2  COMPARE FOR ALL SELECTED BITS SET
          LMML   FS1BTB+1,T2  COMPARE FOR ALL SELECTED BITS SET
          ZJN    IFC250      IF ALL SELECTED BITS SET IN FS1

IFC230    LDN    2D          UPDATE FS1BTB TABLE INDEX
          RADL   T2
          ADC    -FS1BTBL    CHECK OF END OF FS1BTB TABLE
          MJN    IFC220      IF NOT END OF FS1BTB TABLE

          LDML   FS1BY4      GET FAULT STATUS 1 BYTES 4 AND 5
          ADML   FS1BY6      ADD FAULT STATUS 1 BYTES 6 AND 7
          ZJN    IFC240      IF FAULT STATUS 1 COMPLETELY PROCESSED
          LDC    2RD         SET FAULT SYMPTOM CODE TO DI4277D
          LJM    IFC110      GO TO GENERATE THE CHARACTERS 77

IFC240    LJM    IFC120      GO TO SET FAULT SYMPTOM CODE IN BUFFER

*         CLEAR THE FAILING BIT INDICATORS IN FAULT STATUS 1.

IFC250    LDML   FS1BY4      GET FAULT STATUS 1 BYTES 4 AND 5
          LMML   FS1BTB,T2   CLEAR FAILING BIT INDICATORS
          STML   FS1BY4      RESET FAULT STATUS 1 BYTES 4 AND 5
          LDML   FS1BY6      GET FAULT STATUS 1 BYTES 6 AND 7
          LMML   FS1BTB+1,T2  CLEAR FAILING BIT INDICATORS
          STML   FS1BY6      RESET FAULT STATUS 1 BYTES 6 AND 7

*         POSSIBLE FAULT STATUS 1 FAILURE HAS BEEN FOUND, CHECK FOR
*         PREVIOUS FAULT STATUS 1 DETECTED. IF A PREVIOUS FAULT WAS
*         ISOLATED, FORCE THE FAULT SYMPTOM CODE TO DI4277C.

          LDDL   T6          CHECK FOR PREVIOUS FAULT STATUS ERROR
          ZJN    IFC260      IF NO PREVIOUS FAULT STATUS ERROR
          LDC    2RC         SET FAULT SYMPTOM CODE TO DI4277C
          LJM    IFC110      GO TO GENERATE THE CHARACTERS 77

*         THE POSSIBLE FAULT STATUS 1 ERROR HAS BEEN FOUND, SAVE THE
*         FAULT SYMPTOM CODE FOR THE FAULT STATUS 1 REGISTER.

IFC260    LDDL   T2          BUILD FS1FSCT TABLE INDEX
          SHN    -1D
          STDL   T4
          LDML   FS1FSCT,T4  SET FS1 FAULT SYMPTOM CODE
          STDL   T6

*         CHECK FOR FAULT SYMPTOM CODES DI4205, 10-12, 17-21,
*         24, 26, 27, 29, 31, 33, 37-44, 47, AND 49. IF THE FAULT
*         SYMPTOM CODE IS ONE OF THESE CODES, RESET THE CLUSTER
*         INDICATOR TO BLANK DISPLAY CODES.

          ADC    -CODE05     CHECK FOR FAULT SYMPTOM CODE DI4205
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4205
          ADC    -CODE10+CODE05  CHECK FOR FAULT SYMPTOM CODE DI4210
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4210
          SBN    CODE11-CODE10  CHECK FOR FAULT SYMPTOM CODE DI4211
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4211
          SBN    CODE12-CODE11  CHECK FOR FAULT SYMPTOM CODE DI4212
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4212
          SBN    CODE17-CODE12  CHECK FOR FAULT SYMPTOM CODE DI4217
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4217
          SBN    CODE18-CODE17  CHECK FOR FAULT SYMPTOM CODE DI4218
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4218
          SBN    CODE19-CODE18  CHECK FOR FAULT SYMPTOM CODE DI4219
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4219
          ADC    -CODE20+CODE19  CHECK FOR FAULT SYMPTOM CODE DI4220
          NJN    IFC280      IF FAULT SYMPTOM CODE IS NOT DI4220
 IFC270   LJM    IFC290      FAULT SYMPTOM CODE IS DI4220
 IFC280   SBN    CODE21-CODE20  CHECK FOR FAULT SYMPTOM CODE DI4221
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4221
          SBN    CODE24-CODE21  CHECK FOR FAULT SYMPTOM CODE DI4224
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4224
          SBN    CODE26-CODE24  CHECK FOR FAULT SYMPTOM CODE DI4226
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4226
          SBN    CODE27-CODE26  CHECK FOR FAULT SYMPTOM CODE DI4227
          ZJN    IFC270      IF FAULT SYMPTOM CODE DI4227
          SBN    CODE29-CODE27  CHECK FOR FAULT SYMPTOM CODE DI4229
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4229
          ADC    -CODE31+CODE29  CHECK FOR FAULT SYMPTOM CODE DI4231
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4231
          SBN    CODE33-CODE31  CHECK FOR FAULT SYMPTOM CODE DI4233
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4233
          SBN    CODE37-CODE33  CHECK FOR FAULT SYMPTOM CODE DI4237
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4237
          SBN    CODE38-CODE37  CHECK FOR FAULT SYMPTOM CODE DI4238
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4238
          SBN    CODE39-CODE38  CHECK FOR FAULT SYMPTOM CODE DI4239
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4239
          ADC    -CODE40+CODE39  CHECK FOR FAULT SYMPTOM CODE DI4240
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4240
          SBN    CODE41-CODE40  CHECK FOR FAULT SYMPTOM CODE DI4241
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4241
          SBN    CODE42-CODE41  CHECK FOR FAULT SYMPTOM CODE DI4242
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4242
          SBN    CODE43-CODE42  CHECK FOR FAULT SYMPTOM CODE DI4243
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4243
          SBN    CODE44-CODE43  CHECK FOR FAULT SYMPTOM CODE DI4244
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4244
          SBN    CODE47-CODE44  CHECK FOR FAULT SYMPTOM CODE DI4247
          ZJN    IFC290      IF FAULT SYMPTOM CODE DI4247
          SBN    CODE49-CODE47  CHECK FOR FAULT SYMPTOM CODE DI4249
          NJN    IFC300      IF NOT FAULT SYMPTOM CODE DI4249
IFC290    LDC    2R          RESET CLUSTER INDICATOR TO BLANKS
          STDL   T7
          UJN    IFC330      GO TO CONTINUE FAULT STATUS 1 PROCESSING

*         CHECK THAT LOCATION T7 DOES NOT CONTAIN ZERO.  THIS ENSURES
*         THAT THE FAULT CAN BE ISOLATED TO A FAILING CLUSTER.  IF THE
*         FAULT CANNOT BE ISOLATED TO A FAILING CLUSTER, (I.E.  T7
*         CONTAINS ZERO), FORCE THE FAULT SYMPTOM CODE TO DX4277D.

IFC300    LDDL   T7          GET FAILING CLUSTER INDICATOR
          NJN    IFC305      IF FAILING CLUSTER ISOLATED
          LDC    2RD         SET FAULT SYMPTOM CODE TO DX4277D
          LJM    IFC110      GO TO GENERATE THE CHARACTERS 77

*         CHECK FOR FAULT SYMPTOM CODES DI4222. IF THE FAULT SYMPTOM
*         CODE IS A DI4222, RESET THE CLUSTER INDICATOR X (A, B, C, D)
*         TO A X2 IF BITS 49, 50 AND 51 ARE CLEAR, TO A X0 IF EITHER
*         BIT 49 OR 50 IS SET OR TO A X1 IF BIT 51 IS SET.

IFC305    LDDL   T6          GET FAULT SYMPTOM CODE
          ADC    -CODE22     CHECK FOR FAULT SYMPTOM CODE DI4222
          NJN    IFC340      IF NOT FAULT SYMPTOM CODE DI4222
          LDML   FS1BY6      GET FAULT STATUS 1 BYTES 6 AND 7
          LPC    FS1MSK3     CHECK IF BITS 49, OR 50, OR 51 SET
          ZJN    IFC320      IF BITS 49, 50 AND 51 CLEAR
          LPC    BT51        CHECK FOR BIT 51 SET
          ZJN    IFC310      IF BIT 51 IS NOT SET
          LDN    1R1-1R0     SET CLUSTER INDICATOR TO X0
IFC310    SBN    1R2-1R0     SET CLUSTER INDICATOR TO X1
IFC320    ADN    1R2-1R      SET CLUSTER INDICATOR TO X2
          RADL   T7
          LDML   FS1BY6      GET FAULT STATUS 1 BYTES 6 AND 7
          LPC    -FS1MSK3    CLEAR BITS 49, 50 AND 51
          STML   FS1BY6      SAVE UPDATED FS1, BYTES 6 AND 7
IFC330    LJM    IFC230      GO TO CONTINUE FAULT STATUS 1 PROCESSING

*         CHECK FOR FAULT SYMPTOM CODES DI4223, DI4228, DI4230, DI4232
*         AND DI4234. IF THE FAULT SYMPTOM CODE IS ONE OF THESE CODES,
*         RESET THE CLUSTER INDICATOR X (A, B, C, D) TO A X1 IF BITS 49
*         AND 50 ARE CLEAR OR TO A X0 IF EITHER BIT 49 OR 50 IS SET.

IFC340    SBN    CODE23-CODE22  CHECK FOR FAULT SYMPTOM CODE DI4223
          ZJN    IFC350      IF FAULT SYMPTOM CODE DI4223
          SBN    CODE28-CODE23  CHECK FOR FAULT SYMPTOM CODE DI4228
          ZJN    IFC350      IF FAULT SYMPTOM CODE DI4228
          ADC    -CODE30+CODE28  CHECK FOR FAULT SYMPTOM CODE DI4230
          ZJN    IFC350      IF FAULT SYMPTOM CODE DI4230
          SBN    CODE32-CODE30  CHECK FOR FAULT SYMPTOM CODE DI4232
          ZJN    IFC350      IF FAULT SYMPTOM CODE DI4232
          SBN    CODE34-CODE32  CHECK FOR FAULT SYMPTOM CODE DI4234
          NJN    IFC330      IF NOT FAULT SYMPTOM CODE DI4234
IFC350    LDML   FS1BY6      GET FAULT STATUS 1 BYTES 6 AND 7
          LPC    FS1MSK2     CHECK FOR BIT 49 OR 50 SET
          ZJN    IFC360      IF BIT 49 AND 50 IS NOT SET
          LCN    1R1-1R0     SET CLUSTER INDICATOR TO X1
IFC360    ADN    1R1-1R      SET CLUSTER INDICATOR TO X0
          RADL   T7
          LDML   FS1BY6      GET FAULT STATUS 1 BYTES 6 AND 7
          LPC    -FS1MSK2    CLEAR BITS 49 AND 50
          STML   FS1BY6      SAVE UPDATED FS1, BYTES 6 AND 7
          UJN    IFC330      GO TO CONTINUE FAULT STATUS 1 PROCESSING

FSBUFR    TITLE  FAULT STATUS 1 AND 2 TEMPORARY BUFFER
*         FAULT STATUS 1 AND 2 BUFFER.

FSBUFR    BSS    0           FAULT STATUS 1 AND 2 BUFFER
FS1BY0    BSS    0           FAULT STATUS 1, BYTE 0
FS1BY1    BSS    0           FAULT STATUS 1, BYTE 1
          CON    0           FAULT STATUS 1 WORD 1, BYTES 0 AND 1

FS1BY2    BSS    0           FAULT STATUS 1, BYTE 2
FS1BY3    BSS    0           FAULT STATUS 1, BYTE 3
          CON    0           FAULT STATUS 1 WORD 2, BYTES 2 AND 3

FS1BY4    BSS    0           FAULT STATUS 1, BYTE 4
FS1BY5    BSS    0           FAULT STATUS 1, BYTE 5
          CON    0           FAULT STATUS 1 WORD 3, BYTES 4 AND 5

FS1BY6    BSS    0           FAULT STATUS 1, BYTE 6
FS1BY7    BSS    0           FAULT STATUS 1, BYTE 7
          CON    0           FAULT STATUS 1 WORD 4, BYTES 6 AND 7


*         FAULT STATUS 2 BYTE OFFSETS IN THE STATUS BUFFER.

FS2BY0    BSS    0           FAULT STATUS 2, BYTE 0
FS2BY1    BSS    0           FAULT STATUS 2, BYTE 1
          CON    0           FAULT STATUS 2 WORD 1, BYTES 0 AND 1

FS2BY2    BSS    0           FAULT STATUS 2, BYTE 2
FS2BY3    BSS    0           FAULT STATUS 2, BYTE 3
          CON    0           FAULT STATUS 2 WORD 2, BYTES 2 AND 3

FS2BY4    BSS    0           FAULT STATUS 2, BYTE 4
FS2BY5    BSS    0           FAULT STATUS 2, BYTE 5
          CON    0           FAULT STATUS 2 WORD 3, BYTES 4 AND 5

FS2BY6    BSS    0           FAULT STATUS 2, BYTE 6
FS2BY7    BSS    0           FAULT STATUS 2, BYTE 7
          CON    0           FAULT STATUS 2 WORD 4, BYTES 6 AND 7
FS1BTB    TITLE  FAULT STATUS 1 BIT TABLE FOR FAULT SYMPTOM CODES
FS1BTB    BSS    0
          BITS   BT32+BT44,0  FAULT SYMPTOM CODE EQUALS 01
          BITS   BT32+BT47,0  FAULT SYMPTOM CODE EQUALS 02
          BITS   BT32,0       FAULT SYMPTOM CODE EQUALS 03
          BITS   BT33,0       FAULT SYMPTOM CODE EQUALS 04
          BITS   BT34,0       FAULT SYMPTOM CODE EQUALS 05
          BITS   BT35,0       FAULT SYMPTOM CODE EQUALS 06
          BITS   BT46,0       FAULT SYMPTOM CODE EQUALS 07
          BITS   BT36,BT55    FAULT SYMPTOM CODE EQUALS 08
          BITS   BT36,0       FAULT SYMPTOM CODE EQUALS 09
          BITS   BT37,BT48    FAULT SYMPTOM CODE EQUALS 10
          BITS   BT37,BT53    FAULT SYMPTOM CODE EQUALS 11
          BITS   BT37,0       FAULT SYMPTOM CODE EQUALS 12
          BITS   BT38,BT54    FAULT SYMPTOM CODE EQUALS 13
          BITS   BT38,BT55    FAULT SYMPTOM CODE EQUALS 14
          BITS   BT38,BT56    FAULT SYMPTOM CODE EQUALS 15
          BITS   BT39,BT52    FAULT SYMPTOM CODE EQUALS 16
          BITS   BT40,0       FAULT SYMPTOM CODE EQUALS 17
          BITS   BT41,0       FAULT SYMPTOM CODE EQUALS 18
          BITS   BT42,0       FAULT SYMPTOM CODE EQUALS 19
          BITS   BT43,0       FAULT SYMPTOM CODE EQUALS 20
          BITS   0,BT48+BT57  FAULT SYMPTOM CODE EQUALS 21
          BITS   0,BT55+BT57  FAULT SYMPTOM CODE EQUALS 22
          BITS   0,BT55+BT58  FAULT SYMPTOM CODE EQUALS 23
          BITS   0,BT53+BT59  FAULT SYMPTOM CODE EQUALS 24
          BITS   0,BT56+BT59  FAULT SYMPTOM CODE EQUALS 25
          BITS   0,BT59       FAULT SYMPTOM CODE EQUALS 26
          BITS   0,BT52+BT60  FAULT SYMPTOM CODE EQUALS 27
          BITS   0,BT54+BT60  FAULT SYMPTOM CODE EQUALS 28
          BITS   0,BT52+BT61  FAULT SYMPTOM CODE EQUALS 29
          BITS   0,BT54+BT61  FAULT SYMPTOM CODE EQUALS 30
          BITS   0,BT52+BT62  FAULT SYMPTOM CODE EQUALS 31
          BITS   0,BT54+BT62  FAULT SYMPTOM CODE EQUALS 32
          BITS   0,BT52+BT63  FAULT SYMPTOM CODE EQUALS 33
          BITS   0,BT54+BT63  FAULT SYMPTOM CODE EQUALS 34
          BITS   BT44,0       FAULT SYMPTOM CODE EQUALS 35
          BITS   BT45,0       FAULT SYMPTOM CODE EQUALS 36
          BITS   0,BT49       FAULT SYMPTOM CODE EQUALS 37
          BITS   0,BT50       FAULT SYMPTOM CODE EQUALS 37
          BITS   0,BT51       FAULT SYMPTOM CODE EQUALS 37
          BITS   0,BT63       FAULT SYMPTOM CODE EQUALS 38
          BITS   0,BT62       FAULT SYMPTOM CODE EQUALS 39
          BITS   0,BT61       FAULT SYMPTOM CODE EQUALS 40
          BITS   0,BT60       FAULT SYMPTOM CODE EQUALS 41
          BITS   0,BT58       FAULT SYMPTOM CODE EQUALS 42
          BITS   0,BT57       FAULT SYMPTOM CODE EQUALS 43
          BITS   BT39,0       FAULT SYMPTOM CODE EQUALS 44
          BITS   BT38,0       FAULT SYMPTOM CODE EQUALS 45
          BITS   BT47,0       FAULT SYMPTOM CODE EQUALS 46
          BITS   0,BT48       FAULT SYMPTOM CODE EQUALS 47
          BITS   0,BT52       FAULT SYMPTOM CODE EQUALS 48
          BITS   0,BT53       FAULT SYMPTOM CODE EQUALS 49
          BITS   0,BT54       FAULT SYMPTOM CODE EQUALS 60
          BITS   0,BT55       FAULT SYMPTOM CODE EQUALS 61
          BITS   0,BT56       FAULT SYMPTOM CODE EQUALS 62
FS1BTBL   EQU    *-FS1BTB     LENGTH OF THE FAULT STATUS TABLE
FS1FSCT   TITLE  FAULT STATUS 1 FAULT SYMPTOM CODES
*         FAULT STATUS 1 FAULT SYMPTOM CODES TABLE.

FS1FSCT   BSS    0
          DATA   H*01*       FAULT SYMPTOM CODE FOR BITS 32 AND 44
          DATA   H*02*       FAULT SYMPTOM CODE FOR BITS 32 AND 47
          DATA   H*03*       FAULT SYMPTOM CODE FOR BIT 32
          DATA   H*04*       FAULT SYMPTOM CODE FOR BIT 33
          DATA   H*05*       FAULT SYMPTOM CODE FOR BIT 34
          DATA   H*06*       FAULT SYMPTOM CODE FOR BIT 35
          DATA   H*07*       FAULT SYMPTOM CODE FOR BIT 46
          DATA   H*08*       FAULT SYMPTOM CODE FOR BITS 36 AND 55
          DATA   H*09*       FAULT SYMPTOM CODE FOR BIT 36
          DATA   H*10*       FAULT SYMPTOM CODE FOR BITS 37 AND 48
          DATA   H*11*       FAULT SYMPTOM CODE FOR BITS 37 AND 53
          DATA   H*12*       FAULT SYMPTOM CODE FOR BIT 37
          DATA   H*13*       FAULT SYMPTOM CODE FOR BITS 38 AND 54
          DATA   H*14*       FAULT SYMPTOM CODE FOR BITS 38 AND 55
          DATA   H*15*       FAULT SYMPTOM CODE FOR BITS 38 AND 56
          DATA   H*16*       FAULT SYMPTOM CODE FOR BITS 39 AND 52
          DATA   H*17*       FAULT SYMPTOM CODE FOR BIT 40
          DATA   H*18*       FAULT SYMPTOM CODE FOR BIT 41
          DATA   H*19*       FAULT SYMPTOM CODE FOR BIT 42
          DATA   H*20*       FAULT SYMPTOM CODE FOR BIT 43
          DATA   H*21*       FAULT SYMPTOM CODE FOR BITS 48 AND 57
          DATA   H*22*       FAULT SYMPTOM CODE FOR BITS 55 AND 57
          DATA   H*23*       FAULT SYMPTOM CODE FOR BITS 55 AND 58
          DATA   H*24*       FAULT SYMPTOM CODE FOR BITS 53 AND 59
          DATA   H*25*       FAULT SYMPTOM CODE FOR BITS 56 AND 59
          DATA   H*26*       FAULT SYMPTOM CODE FOR BIT 59
          DATA   H*27*       FAULT SYMPTOM CODE FOR BITS 52 AND 60
          DATA   H*28*       FAULT SYMPTOM CODE FOR BITS 54 AND 60
          DATA   H*29*       FAULT SYMPTOM CODE FOR BITS 52 AND 61
          DATA   H*30*       FAULT SYMPTOM CODE FOR BITS 54 AND 61
          DATA   H*31*       FAULT SYMPTOM CODE FOR BITS 52 AND 62
          DATA   H*32*       FAULT SYMPTOM CODE FOR BITS 54 AND 62
          DATA   H*33*       FAULT SYMPTOM CODE FOR BITS 52 AND 63
          DATA   H*34*       FAULT SYMPTOM CODE FOR BITS 54 AND 63
          DATA   H*35*       FAULT SYMPTOM CODE FOR BIT 44
          DATA   H*36*       FAULT SYMPTOM CODE FOR BIT 45
          DATA   H*37*       FAULT SYMPTOM CODE FOR BIT 49
          DATA   H*37*       FAULT SYMPTOM CODE FOR BIT 50
          DATA   H*37*       FAULT SYMPTOM CODE FOR BIT 51
          DATA   H*38*       FAULT SYMPTOM CODE FOR BIT 63
          DATA   H*39*       FAULT SYMPTOM CODE FOR BIT 62
          DATA   H*40*       FAULT SYMPTOM CODE FOR BIT 61
          DATA   H*41*       FAULT SYMPTOM CODE FOR BIT 60
          DATA   H*42*       FAULT SYMPTOM CODE FOR BIT 58
          DATA   H*43*       FAULT SYMPTOM CODE FOR BIT 57
          DATA   H*44*       FAULT SYMPTOM CODE FOR BIT 39
          DATA   H*45*       FAULT SYMPTOM CODE FOR BIT 38
          DATA   H*46*       FAULT SYMPTOM CODE FOR BIT 47
          DATA   H*47*       FAULT SYMPTOM CODE FOR BIT 48
          DATA   H*48*       FAULT SYMPTOM CODE FOR BIT 52
          DATA   H*49*       FAULT SYMPTOM CODE FOR BIT 53
          DATA   H*60*       FAULT SYMPTOM CODE FOR BIT 54
          DATA   H*61*       FAULT SYMPTOM CODE FOR BIT 55
          DATA   H*62*       FAULT SYMPTOM CODE FOR BIT 56
FS2FSCT   TITLE  FAULT STATUS 2 FAULT SYMPTOM CODES
*         FAULT STATUS 2 FAULT SYMPTOM CODES TABLE.

FS2FSCT   BSS    0
          DATA   H*777 *     CHANNEL EQUALS  7
          DATA   H*776 *     CHANNEL EQUALS  6
          DATA   H*775 *     CHANNEL EQUALS  5
          DATA   H*774 *     CHANNEL EQUALS  4
          DATA   H*773 *     CHANNEL EQUALS  3
          DATA   H*772 *     CHANNEL EQUALS  2
          DATA   H*771 *     CHANNEL EQUALS  1
          DATA   H*770 *     CHANNEL EQUALS  0
          DATA   H*7717*     CHANNEL EQUALS 17
          DATA   H*0   *     NOT AVAILABLE
          DATA   H*7715*     CHANNEL EQUALS 15
          DATA   H*0   *     NOT AVAILABLE
          DATA   H*7713*     CHANNEL EQUALS 13
          DATA   H*7712*     CHANNEL EQUALS 12
          DATA   H*7711*     CHANNEL EQUALS 11
          DATA   H*7710*     CHANNEL EQUALS 10
          DATA   H*0   *     NOT AVAILABLE
          DATA   H*0   *     NOT AVAILABLE
          DATA   H*0   *     NOT AVAILABLE
          DATA   H*7724*     CHANNEL EQUALS 24
          DATA   H*7723*     CHANNEL EQUALS 23
          DATA   H*7722*     CHANNEL EQUALS 22
          DATA   H*7721*     CHANNEL EQUALS 21
          DATA   H*7720*     CHANNEL EQUALS 20
          DATA   H*7740*     MAC ERROR
          DATA   H*0   *     NOT AVAILABLE
          DATA   H*0   *     NOT USED
          DATA   H*7741*     RADIAL INTERFACE 1/2/3 ERROR
          DATA   H*7733*     CHANNEL EQUALS 33
          DATA   H*7732*     CHANNEL EQUALS 32
          DATA   H*7731*     CHANNEL EQUALS 31
          DATA   H*7730*     CHANNEL EQUALS 30
          QUAL   *

*copy     ctp$convert_digits_to_ascii
*copy     ctp$dft_write_fsc_to_buffer
          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY (ANALYSE 960 IOU ERRORS)
          QUAL
*COPYC CTP$DFT_ANALYZE_IOU_ERRORS_I4
*COPYC CTP$DFT_PROCESS_DUAL_I4_IOU_ERR
*COPY CTP$DFT_SET_SS_DUAL_I4
 CEE      SPACE  4,10
**        CEE - CHECK FOR EXPECTED IOU ERROR
*
*         STUB ON UPPER 8XX CLASS

 CEE      SUBR               ENTRY/EXIT
          LDN    0
          UJN    CEEX
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (ANALYSE 960 MEMORY ERRORS)
 AME      SPACE  4,10
**        AME - PROCESS MEMORY ERRORS.
*
*         CALLS  CLR, GSC, FMB, *CFF*, *LOG*, *SME*.


          ROUTINE AME

          LDN    0
          STM    RLST        CORRECTED ERROR FLAG
          STM    NERR        SET NO ERROR FLAG FLAG
          STML   SBER
          STML   SBER+1
          STML   SYCD
          LDN    BC
          RJM    CLR         ZERO SCRATCH BUFFER
          LDM    ME0U        MERGED MEMORY ERROR REGISTER LISTS
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          CALL   CFF         CHECK FOR FREEZE
          LDM    RTP2
          ZJN    AME0.1      IF NOT TO IGNORE ERROR
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJP    AMEX

 AME0.1   LDM    SUMS        SUMMARY STATUS
          SHN    21-SSUE
          PJP    AME3        IF NOT UNCORRECTED
          LDC    MUL2
          RJM    FMB
          CRDL   W0          READ IN UEL2 REGISTER
          LDDL   W0
          SHN    2
          PJP    AME0        IF DATA IN REGISTER IS NOT VALID
          LDDL   W3          BITS 48 - 55
          SHN    -10
          NJP    AME0        IF NOT PARTIAL WRITE PARITY ERROR
          LDDL   W3          BITS 56 - 63
          LPC    0#FF
          ZJP    AME0        IF NOT PARTIAL WRITE PARITY ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PARTIAL WRITE PARITY ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).
*         DFT ANALYSIS - OS ACTION = MULTIPLE ODD BIT ERROR (VERSION 3).
                                   = STEP SYSTEM (VERSION 4)
          SETDAC DDCM
          SETDAN (EPUN,DAUME)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          SETOSA OSMOB,OSSS
          UJP    AME1        LOG THE ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED CM ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED MEMORY ERROR.

 AME0     SETDAC DDCM
          SETDAN (EPUN,DAUME)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          SETOSA OSUCM
 AME1     LDM    ME0U        UNCORRECTED MEMORY REGISTER LIST
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          CALL   CFF         CHECK FOR FREEZE
          LDM    RTP2
          ZJN    AME1.1      IF NOT TO IGNORE ERROR
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJP    AMEX
 AME1.1   CALL   LOG
 AME2     LJM    AMEX        RETURN

 AME3     LDM    SUMS
          SHN    21-SSCE
          PJN    AME2        IF NOT A CORRECTED ERROR
          LDN    1
          STM    RLST        SET CORRECTED ERROR LIST FLAG

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = CORRECTED CM ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = CORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).

          SETDAC DDCM
          SETDAN (EPCO,DACME)
          SETFLG (BC.FL)
          LDM    ME0C        CORRECTED MEMORY ERROR REGISTERS
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          CALL   CFF
          LDM    RTP2
          ZJN    AME3.5      IF NOT TO IGNORE ERROR
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJP    AMEX

*         PROCESS CYBER 960 MEMORY ERRORS.

 AME3.5   RJM    GSC         GET SYNDROME CODE
          LDDL   W2
          SHN    -10
          STML   SBER+1      LOWER ADDRESS BITS 32 - 33
          LDDL   W1
          LPC    0#FF
          SHN    10
          RAML   SBER+1      BITS 13 - 28 OF ADDRESS
          LDDL   W1
          SHN    -10
          STML   SBER        BITS 5 - 12 OF ADDRESS
          LDDL   W0
          LPN    0#F         BITS 1 - 4  OF ADDRESS
          SHN    10
          RAML   SBER

          CALL   SME
          LJM    AMEX        RETURN
 GSC      SPACE  4,10
**        GSC - GET SYNDROME CODE.
*
*         ENTRY  (W0 - W3) = PROPER *CEL* REGISTER.
*
*         EXIT   (SYCD) = SYNDROME CODE.
*
*         USES   W0 - W3, *SYCD*.


 GSC      SUBR               ENTRY/EXIT
          LDN    0
          STM    SYCD
          LDC    MCEL        READ CORRECTED ERROR LOG REGISTER
          RJM    FMB
          CRDL   W0
          LDDL   W0
          SHN    21-17
          PJP    AMEX        IF VALID BIT NOT SET
          LDDL   W3
          SHN    -10
          STML   SYCD
          LJM    GSCX        RETURN

*COPY CTP$DFT_SERVICE_MEMORY_ERROR
*COPY CTP$DFT_REWRITE_CM_ERROR
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (LOG ERROR TO BUFFER CONTROL WORDS)


 QUAL$    EQU    0           DEFINE UNQUALIFIED COMMON DECKS
*COPYC CTP$DFT_LOG_ERROR
*COPY CTP$DFT_LOG_ERROR_CHECK_MATCH
*COPY CTP$DFT_ZERO_SUPPORTIVE_STATUS
*COPY CTP$DFT_INCREMENT_ERROR_COUNT
*COPY CTP$DFT_FIND_CONTROL_WORD
*COPY CTC$DFT_ELEMENT_CONVERSIONS
 ABL      SPACE  4,10
**        ABL - ADJUST BUFFER LENGTH.
*

 ABL      SUBR               ENTRY/EXIT
          LDML   LBUF
          UJN    ABLX
 URC      SPACE  4,10
**        URC - UPDATE RETRY COUNTERS
*
*         NOTE THIS IS A STUB


 URC      SUBR               ENTRY/EXIT
          UJN    URCX
*COPY     CTP$DFT_LOG_ERROR_NO_CONSOLE
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (READ MAINTENANCE REGISTERS)
          QUAL   *           SO THAT OTHER OVERLAYS MAY ACCESS
 PC960    SPACE  4,10
**        CYBER 960 CORRECTED ERROR
*         REGISTER LIST.


 PA960    REGLST (10,00,11,12,30,31,32,80,81,82,83,84,85,86,87,88,89,A0)

 MA960    SPACE  4,10
**        CYBER 960 REGISTER LIST FOR ALL MEMORY ERRORS.

 MA960    REGLST (10,00,12,20,A0,A4,A8,21)
 SXIU     SPACE  4,10
**        I1/I1CR/I2/I4 IN I2 MODE CORRECTED AND/ UNCORRECTED IOU ERROR LIST.


 SXIU     REGLST (10,00,12,30,40,80,81,A0,18,21)
 I4IC     SPACE  4,10
**        I4 CORRECTED IOU ERROR LIST.


 I4IC     REGLST (10,00,12,30,40,80,81,A0,18,21,16,34,44,84,85,A4,1C,25)
 I4IU     SPACE  4,10
**        I4 UNCORRECTED IOU ERROR LIST.


 I4IU     REGLST (10,00,12,30,40,80,81,A0,18,21,16,34,44,84,85,A4,1C,25)

*COPYC CTP$DFT_READ_MAINTENANCE_REGS
*COPY CTP$DFT_ZERO_SUPPORTIVE_STATUS

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (PROCESSOR PRIMITIVES)
*COPY CTP$DFT_PROCESSOR_PRIMITIVES
          SPACE  4,10
**        PHE -  PIP3  HALF-EXCHANGE IN ROUTINE TO START PROCESSOR
*
*         ENTRY  PROCESSOR MASTER CLEARED, *CSA* REGISTER SET TO (STEX)
*                *BLOCK EXCHANGE REQUEST* AND *DISABLE PROCESSOR FAULT
*                STATUS* BITS ARE CLEARED IN *DEC*, PROCESSOR STARTED
*                AND THE DEADSTART INTERLOCK IS CLEARED IN THE *ECIB*.
*
*         EXIT   PROCESSOR HALF EXCHANGED IN TO *MPS* OR *JPS*
*


          ROUTINE PHE

*         START THE PROCESSOR.

          LDN    SSMR
          STD    RN
          LDM    HBUF+CPRPC
          RJM    RMR         READ STATUS SUMMARY
          LPN    MSSM        CHECK FOR MONITOR MODE
          ZJN    PHE1        IF JOB
          LDML   HEIM        GET HALF EXCHANGE IN ADDRESS-MTR
          UJN    PHE2

PHE1      LDML   HEIJ        GET HALF EXCHANGE IN ADDRESS-JOB
PHE2      STM    PHEB+7
          SHN    -8D
          STM    PHEB+6
          LOCKMR SET
          FUNCMR HBUF+CPRPC,MRMC     MASTER CLEAR PROCESSOR
          LDML   CSAR
          STDL   RN
          WRITMR PHEB,HBUF+CPRPC
          FUNCMR HBUF+CPRPC,MRSP     START PROCESSOR
          LDC    200D        WAIT 100 MICRO SECS
 PHE3     SBN    1
          NJN    PHE3        DELAY

*         CLEAR MAINTENANCE REGISTER INTERLOCK.

          LOCKMR CLEAR
          LJM    PHEX        RETURN

 PHEB     BSSZ   10          CONTROL STORE ADDRESS

*         THE FOLLOWING ROUTINES ARE STUBS BECAUSE THEY ARE
*         NOT NEEDED ON AN 960.

          ROUTINE STRBTS
          LJM    STRBTSX


 CLRBTS   SUBR
          LJM    CLRBTSX
*COPYC CTP$DFT_MANAGE_MEMORY_PORT

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (MASSAGE CPU REGISTERS)
*COPY CTP$DFT_MASSAGE_CPU_REGISTERS

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (CLEAR ERRORS)
 CLE      SPACE  4,10
**        CLE - CLEAR ERRORS.
*
*         EXIT   ALL REGISTERS NECESSARY WILL BE CLEARED OF ERRORS.


          ROUTINE CLE

          LDM    HBUF+HDRPC
          LPC    7417
          STD    EC
          FUNCMR ,MRCE       CLEAR ERRORS FROM *PFS* REGISTERS
          LJM    CLEX        RETURN
 CCE      SPACE  4,10
**        CCE - CLEAR CM ERRORS.
*
*         CALLS  FMB, UPR.


          ROUTINE CCE

          FUNCMR CMCC,MRCE   CLEAR ERRORS FROM *PFS* REGISTERS
          LJM    CCEX        RETURN

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_OS_REQUESTS
*COPYC CTP$DFT_OS_REQUESTS_PACKETS

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS - DUAL I4)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPY  CTP$DFT_REQUESTS_DUAL_I4
*COPY CTP$DFT_CHECK_TPM_PKT_RESPONSE

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS FOR IOU1)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPY  CTP$DFT_REQUESTS_IOU1_DUAL_I4

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS - 2)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_REQUEST_PROCESSOR_2

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (PP REQUEST PROCESSORS)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_PP_UTILITY_REQUESTS
*COPY  CTP$DFT_DUMP_PP_REGISTERS
*COPY  DSI$DUMP_LOAD_IDLE_PP

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (UPDATE C170 MEMORY)
*COPYC CTP$DFT_UPDATE_170_MEMORY

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (READ EPM DATA)
*COPYC CTP$DFT_READ_EPM_DATA

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT ERROR LOGGING ROUTINES)
*COPY     CTP$DFT_PROCESS_DISK_ERROR
*COPY CTP$DFT_RETURN_ERROR_CODE

          OVERFLOW  R2ORG
          OVERLAY  (RESTART SCI PP)
 QUAL$    EQU    0
*COPYC CTP$DFT_RESTART_SCI
*COPY DSI$DUMP_LOAD_IDLE_PP
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (HANDLE BLOCKED IOU ACCESS TO CM),10000B
*COPY CTP$DFT_HANDLE_IOU_BIT57
          OVERLAY  (DFT RUN TIME ERROR HANDLING)
*COPY CTP$DFT_RUN_TIME_ERROR_HANDLER
*COPY CTP$DFT_RETURN_ERROR_CODE
*copy     ctp$construct_message_in_eicb

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          END
/EOR
