          IDENT  DFT1,70B
          CIPPU  J
          MEMSEL 16
          BASE   MIXED
          TITLE  CTM$DFT LOWER 8XX CLASS (DFT1).
          COMMENT *SMD* LVL=11
          COMMENT COPYRIGHT CONTROL DATA SYSTEMS INC. 1992
 DFT      SPACE  4,10
***       DFT - DEDICATED FAULT TOLERANCE.
*         B. R. HANSON.      82/06/21. (PRECURSOR KNOWN AS SMU)
*         G. J. FALCONER.    85/08/05. (DFT V1.0)
*         G. J. FALCONER.    86/02/27. (DFT V2.0)
 DFT      SPACE  4,10
***       DFT PERFORMS:
*
*         1) CAPTURING THE CONTENT OF MAINFRAME MAINTENANCE REGISTERS
*         FOR ERROR LOGGING, AND CLEARING HARDWARE ELEMENT ERRORS.
*
*         3) THE ACTUAL SEQUENCE OF STEPS TO DEADSTART THE SYSTEM FROM
*         C170 STATE OPERATION TO DUAL-STATE OPERATION OR TO RETURN IT TO
*         STANDALONE C170 OPERATION.  THIS IS PERFORMED UPON THE REQUEST
*         OF THE PP BOOT (*VPB* STATE OF *SCI*).
*
*         4) PROVIDING EXTERNALIZATIONS OF *2AP* FUNCTIONS TO NOS/VE.
 CONTROL  SPACE  4,10
**        ASSEMBLY PARAMETERS.


 PRGM     SET    2           SET *OVERLAY* MACRO TO *DFT* NAMES
 PPTYPE   EQU    0           TURN ON TRACKING OF UPPER/LOWER PP
*STEP$    SET    1           ASSEMBLE *STEP* CODE IF SYMBOL DEFINED
          LIST   X
*COPY     CTP$DFT_RELEASE_HISTORY
*COPY     CTH$DEDICATED_FAULT_TOLERANCE
          LIST   *
 COMMON   SPACE  4,10
**        COMMON DECKS.
*COPYC DSI$PP_MACROS
*COPYC DSI$MAINTENANCE_REGISTER_MACROS
*COPYC CTI$COMPASS_OS_LEVELS
*COPYC CTC$DFT_MACROS
          LIST   X
*COPYC CTC$DFT_DIRECT_CELLS
          LIST   *
*COPYC CTI$DFT_ANALYSIS_CODES
*COPY DSC$PP_MR_AND_TPM_CONSTANTS
*COPY CTC$DFT_CONSTANTS
*COPY CTC$DFT_ACTION_NO_OVERFLOW
*COPY DSA$HARDWARE_TABLE_DEFINITIONS
*COPY DSA$VE_REQUESTS_TO_DFT
*COPY DSI$PP_INSTRUCTION_MNEMONICS
*COPY CTC$EI_CONTROL_BLOCK
          LIST   *

**        START DEFINITION OF THE MAIN LOOP OF DFT.
*
*         THE LOWER 8XX CYBERS REQUIRE EICB UPDATE CODE

*COPYC CTP$DFT_MAIN_LOOP
*COPYC CTP$DFT_MAIN_LOOP_UPDATE_TIME
*COPYC CTP$DFT_MAIN_LOOP_DUAL_STATE
*COPYC CTP$DFT_MAIN_LOOP_NO_PACKETS
 CRN      SPACE  4,10
**        CRN - CHECK RELOCATION NECESSARY
*
*         STUB ON A 810,815,825,830

 CRN      SUBR               ENTRY/EXIT
          UJN    CRNX
 CPC      SPACE  4,10
**        CPC - CHECK FOR PACKET COMMUNICATION
*
*         STUB ON 810,815,825,830

 CPC      SUBR               ENTRY/EXIT
          UJN    CPCX

**        END OF DFT MAIN LOOP DEFINITIONS

*COPYC CTC$DFT_GLOBAL_DATA
*COPYC CTC$DFT_GLOBAL_DATA_NON_S0
 CELCW    CON    0           IGNORED ON 810,815,825,830
 CRFL     CON    0           COST REDUCED MODEL FLAG (810,830)
          LIST   X
*COPYC CTP$DFT_RESIDENT_COMMON
*COPYC CTP$DFT_RESIDENT_ECM_NON_S0
*copy dsi$find_cip_module
*copy dsi$get_hardware_element
*COPYC CTP$MR_PROTOCOL_PREPROCESS_S1
*COPYC CTP$MR_RETRY_OPERATION_FOR_DFT
*COPYC CTP$MR_PROTOCOL_PROCESS
*COPYC CTP$MR_PROTOCOL_POSTPROCESS
*copy DSI$PP_UTILITY_SUBROUTINES
          USE    PRESET
          QUAL   PRESET
*COPYC CTP$DFT_PRESET
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_PRESET_NON_DUAL_I4
 SPO      SPACE  4,10
**        SPO - SETUP MEMORY PORT OFFSET.
*
*         EXIT   PO IS SET TO THE MODEL DEPENDENT PORT OFFSET.
*
*         USES   PO.


 SPO      SUBR               ENTRY/EXIT
          LDN    1           SETUP MEMORY PORT OFFSET
          STD    PO
          UJN    SPOX        RETURN
          USE    *
          QUAL   *
          OVERLAY  (RESIDENT PART II),R2ORG
          QUAL   *
*COPYC CTP$DFT_RESIDENT_II_NON_990
*COPYC CTP$DFT_RESIDENT_II_COMMON
*COPYC CTP$DFT_NON_930_RESIDENT_II
*COPYC DSI$PACK_UNPACK_REGISTERS
*COPYC DSI$VALIDATE_PP_BOUNDS
          USE    OVERFLOW
          ERRNG  10000-*     RESIDENT II OVERFLOWS PP
*COPYC CTP$DFT_PRESET_BUILD_STRUCTURE
          OVERLAY (STANDARD PRESET OVERLAY ROUTINES
*COPYC CTP$DFT_PRESET_STANDARD_OVL
*COPY CTP$DFT_RETURN_ERROR_CODE
 SSO      SPACE  4,10
**        SSO - PRESET  SPECIAL OVERLAY FOR IOU BIT 57 ERROR.
*         NON OPERATIONAL HERE.


 SSO      SUBR
          UJN    SSOX        RETURN
          LIST   *
 SMV      SPACE  4,10
**        SMV - SETUP MODEL DEPENDENT VALUES.
*
*         *SMV* WILL SET UP REGISTER LIST ADDRESSES ON A MODEL DEPENDENT BASIS, AND
*         WILL INITIALIZE ALL MODEL DEPENDENT GLOBAL DATA.


 SMV      SUBR               ENTRY/EXIT
          LDC    SXIU        UNCORRECTED REG LIST FOR IOU
          STM    IO0U        SAVE LIST ADDRESS
          STM    IO0C
          LDC    SXMA        COMPLETE REGISTER LIST FOR MEMORY ERRORS
          STM    ME0U        UNCORRECTED MEMORY ERROR LIST
          STM    ME0C        CORRECTED MEMORY ERROR LIST
          LDM    CPU0M
          LMN    0#14
          ZJN    SMV10       IF 810
          LMN    0#13&0#14
          NJN    SMV20       IF NOT 830
 SMV10    LDN    1
          STM    CRFL        SET COST REDUCED FLAG
          LDC    S1CC
          STM    CP0C        CORRECTED ERROR LIST
          STM    CP1C        SAME FOR CPU 1
          LDC    S1CU
          STM    CP0U        UNCORRECTED ERROR LIST
          STM    CP1U        SAME FOR CPU 1
          UJN    SMV30

 SMV20    LDC    S1PC
          STM    CP0C        CORRECTED ERROR LIST
          LDC    S1PU
          STM    CP0U        UNCORRECTED ERROR LIST
 SMV30    LJM    SMVX

          LIST   X
*COPY     CTP$DFT_NO_CLEAR_PACKETS
*COPYC CTP$DFT_PRESET_NON_PACKETS
          LIST   *
          OVERLAY  (MAIN NON-RESIDENT ROUTINES)

**        START OF THE MAIN NON RESIDENT ROUTINES OVERLAY. ON CYBER 930
*         THIS OVERLAY DEFINES ROUTINES FOR PACKETS, NON I4,
*         HALT ON ERROR PROCESSING, EICB TIME UPDATE, AND PACKET COMMUNICATION.



*COPYC CTP$DFT_MAIN_NON_RES_RTNS
          LIST   X
*COPYC CTP$DFT_MAIN_NON_RES_NON_I4
*COPYC CTP$DFT_MAIN_NON_RES_EICB_TIME
*COPYC CTP$DFT_MAIN_NON_RES_DUAL_STATE
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPY CTP$DFT_PREPARE_FOR_CIP_CALL
*COPYC CTP$DFT_CPU_HANDSHAKER
 BCA      SPACE  4,10
**        BCA - HANDLE BLOCKED CM ACCESS.
*         THIS IS VALID ON A MODEL 44,43 IOU ONLY. (STUB HERE)
          QUAL   HB57


 BCA      SUBR
          UJN    BCAX        RETURN
          QUAL   *

 HOE      SPACE  4,10
**        HOE - HALT ON ERROR
*
*         STUB ON AN S1


          ROUTINE HOE
          LJM    HOEX

 RED      SPACE  4,10
**        RED - READ 960 POWER MONITOR.
*
*         ON ANY MACHINE OTHER THAN THE 960 THIS ROUTINE IS
*         NON FUNCTIONAL.


          ROUTINE RED
          LJM    REDX
          LIST   *
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DO DFT ACTIONS)
          LIST   X
*COPYC CTP$DFT_ACTION_LIST
*COPYC CTP$DFT_ACTION_LIST_OVERFLOW
*COPYC CTP$DFT_ACTION_LIST_DUAL_STATE
*COPYC CTP$DFT_RETURN_TASK_ERROR
          LIST   *
 IAPP     BSS    0           NOT USED ON 810,815,825,830
          TASK   (RRE)

 DDCM     BSS    0           CLEAR CM ERROR
          TASK   (CCE)

 CEP1     BSS    0           CLEAR P1 ERRORS
          TASK   (CP1)
          QUAL   *
          QUAL   *
          QUAL   ABC
*COPY CTP$DFT_RETURN_ERROR_CODE
          QUAL   *
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          LIST   X
          OVERLAY (SAVE PP REGISTERS IN CENTRAL MEMORY)
*COPYC CTP$DFT_SAVE_PP_REGISTERS
*COPY  CTP$DFT_DUMP_PP_REGISTERS
*COPY  DSI$DUMP_LOAD_IDLE_PP
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (DFT ERROR CONTROL OVERLAY)
*COPYC CTP$DFT_ERROR_CONTROL

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (LOG TOP OF HOUR COUNTERS)

*COPYC CTP$DFT_LOG_COUNTERS
 RMC      SPACE  4,10
**        RMC - RESET MODEL DEPENDENT COUNTERS.
*


          ROUTINE RMC        ENTRY/EXIT
          LJM    RMCX

 RMCF     CON    0
*COPY     CTP$DFT_NO_RESET_PIT
*COPY     CTP$DFT_NO_TEST_DLD_PATH

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (ENVIRONMENT/SHORT WARNING PROCESSORS)

**        THIS OVERLAY HAS A STUBBED REFERENCE TO CHECK IF THE CONSOLE IS ALIVE.
*         ON CYBER 990 THIS MECHANISM IS NOT USED. THE STUB REPORTS THE CONSOLE IS ALIVE.

*COPYC CTP$DFT_ENVIRONMENT_RTNS
*COPY  CTP$DFT_FIND_WARNING_IN_NRSB
 CCA      SUBR
          LDN    1
          UJN    CCAX        REPORT CONSOLE ALIVE ON NON S0 MACH.
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          LIST   *
          OVERLAY  (ANALYSE PROCESSOR ERRORS)
 APE      SPACE  4,10
**        APE - ANALYSE PROCESSOR ERRORS.
*
*         CALLS  BRL, CID, CLR, PAC, SCS, SSE, *CFF*, *LOG*, *RMR*, *STP*, *SWP*.


          ROUTINE APE

          LDN    0
          STM    NERR        SET NO ERROR FLAG FALSE

*         IT IS NECESSARY TO SAVE THE PRE-HALT STATUS SUMMARY BECAUSE
*         HALTING THE PROCESSOR WILL SET THIS BIT.

          LDM    SUMS        SUMMARY STATUS
          STM    OLSS        SAVE PRE-HALT PROCESSOR SUMMARY STATUS
          SHN    21-SSSW     SHORT WARNING
          PJN    APE0        IF NO SHORT WARNING
          CALL   SWP         CALL SHORT WARNING PROCESSOR
          LJM    APEX        RETURN

 APE0     RJM    CTE         CHECK THRESHOLD EXCEEDED
          NJP    APEX        IF THRESHOLD EXCEEDED IGNORE ERROR
          CALL   CFF         CHECK FOR FREEZE
          LDM    RTP2
          ZJN    APE0.5      IF NOT TO IGNORE ERROR
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJP    APEX

 APE0.5   LDN    0
          RJM    SCS         SAVE PRE-HALT CONTROL STORE ADDRESS
          CALL   STP         CALL STOP PROCESSOR
          LDM    CPUO
          STM    CPUH        HALTED CPU ORDINAL
          LDN    1
          RJM    SCS         SAVE AFTER HALT CONTROL STORE ADDRESS

*         DISABLE *PFS* AND BLOCK EXCHANGE REQUEST BITS SET IN *DEC*.

          LDN    BC
          RJM    CLR
          LDM    OLSS
          SHN    21-SSPH     PROCESSOR HALT IN SUMMARY STATUS
          PJP    APE7        IF PROCESSOR NOT HALTED
          LDM    CPUH        CPU ORDINAL
          NJN    APE1        IF CPU 1
          LDML   CP0CC       CPU 0 CONNECT CODE
          UJN    APE2

 APE1     LDML   CP1CC       CPU 1 CONNECT CODE
 APE2     STDL   EC
          LDML   CSAR
          STDL   RN
          READMR RDATA
          RJM    PAC         PACK REGISTER TO *MRVAL*
          LDML   MRVAL+3
          LMC    0#185
          ZJN    APE3        IF CLASS II ERROR UCR/MCR HALT
          LMN    0#189&0#185
          ZJN    APE3        IF CLASS II ERROR TRAP EXECEPTION IN MONITOR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PROCESSOR HALT CLASS I.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).

          SETDAC DDDC
          SETDAN (EPUN,DAPH)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          UJN    APE4

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PROCESSOR HALT CLASS II.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).

 APE3     SETDAC DDDC
          SETDAN (EPUN,DASWH)
          SETFLG (BC.FV7,BC.FV8,BC.FL)

 APE4     LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE5
          LDM    CP0U        GET UNCORRECTED REGISTER LIST FOR CPU0
          UJN    APE6        CONTINUE

 APE5     LDM    CP1U        GET UNCORRECTED REGISTER LIST FOR CPU1
 APE6     RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LJM    APE16       CONTINUE PROCESSING

 APE7     LDM    SUMS        SUMMARY STATUS
          SHN    21-SSUE     UNCORRECTED ERROR
          PJP    APE10       IF NOT UNCORRECTED ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED PROCESSOR ERROR.
*                                  = NO OS ACTION (VERSION 4).

          SETDAN (EPUN,DAUPE)
          SETFLG (BC.FL)
          SETOSA OSUPE,OSNA
          LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE8
          LDM    CP0U        GET UNCORRECTED REGISTER LIST FOR CPU0
          UJN    APE9        CONTINUE

 APE8     LDM    CP1U        GET UNCORRECTED REGISTER LIST FOR CPU1
 APE9     RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LJM    APE16       CONTINUE PROCESSING

 APE10    LDM    SUMS        SUMMARY STATUS
          SHN    21-SSCE     CORRECTED ERROR
          PJP    APE13       IF NOT CORRECTED ERROR
          LDM    OLSS        GET SAVED STATUS SUMMARY
          SHN    21-SSPH
          MJP    APE13       IF PROCESSOR HALT

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = CORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = CORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).

          SETDAN (EPCO,DACPE)
          SETFLG (BC.FL)
          LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE11
          LDM    CP0C        GET CORRECTED REGISTER LIST FOR CPU0
          UJN    APE12       CONTINUE

 APE11    LDM    CP1C        GET CORRECTED REGISTER LIST FOR CPU1
 APE12    RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LJM    APE16       CONTINUE PROCESSING


*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED PROCESSOR ERROR.
*                                  = NO OS ACTION (VERSION 4).

 APE13    SETDAN (EPUN,DAUPE)
          SETFLG (BC.FL)
          SETOSA OSUPE,OSNA
          LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE14       IF CPU1
          LDM    CP0U        GET UNCORRECTED REGISTER LIST FOR CPU0
          UJN    APE15       CONTINUE

 APE14    LDM    CP1U        GET UNCORRECTED REGISTER LIST FOR CPU1
 APE15    RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS

 APE16    BSS    0           P1 PROCESSING
          LDM    DFTA        DFT ACTION POINTER
          LMC    DDDC        CHECK ACTION
          ZJP    APE18       IF DISABLE CPU
          SETDAC (CEP1)

 APE18    LDM    CPUO
          RJM    SSE         SET SECONDARY ELEMENT IDENTIFIER
          RJM    CID         CHECK IF CPU DEGRADABLE
          CALL   LOG
          LJM    APEX        RETURN

 APEA     CON    0           CPU 0 ID
          CON    0#10        CPU 1 ID

*COPY CTP$DFT_SAVE_CONTROL_STORE
*COPY     CTP$DFT_CHECK_DEGRADABLE_CPU
*COPY CTP$DFT_CHECK_CPU_THRESHOLD

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (ANALYZE IOU ERRORS
          QUAL
*COPYC CTP$DFT_ANALYZE_IOU_ERRORS
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (ANALYSE MEMORY ERRORS)
 AME      SPACE  4,10
**        AME - PROCESS MEMORY ERRORS.
*
*         CALLS  CLR, GSC, FMB, *CFF*, *LOG*, *SME*.


          ROUTINE AME

          LDN    0
          STM    RLST        CORRECTED ERROR FLAG
          STM    NERR        SET NO ERROR FLAG FLAG
          STML   SBER
          STML   SBER+1
          STML   SYCD
          LDN    BC
          RJM    CLR         ZERO SCRATCH BUFFER
          LDM    SUMS        SUMMARY STATUS
          SHN    21-SSUE
          PJP    AME1        IF NOT UNCORRECTED
          READMR RDATA,CMCC,MUL1
          LDM    RDATA
          LPC    0#80
          ZJP    AMEX        IF NOT VALID ERROR
          LDM    RDATA
          LPN    0#08
          ZJP    AME0.1      IF NOT PARTIAL WRITE PARITY ERROR
          LDM    RDATA
          LPN    6           CHECK BITS 5 AND 6
          NJP    AME0.1      IF NO PARTIAL WRITE PARITY ERROR


*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PARTIAL WRITE PARITY ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).
*         DFT ANALYSIS - OS ACTION = MULTIPLE ODD BIT ERROR
                                   = STEP SYSTEM (VERSION 4)
          SETDAC DDCM
          SETDAN (EPUN,DAPWP)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          SETOSA OSMOB,OSSS
          UJP    AME0.2      LOG THIS ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED CM ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED MEMORY ERROR.
*                                  = NO OS ACTION (VERSION 4).

 AME0.1   SETDAC DDCM
          SETDAN (EPUN,DAUME)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          SETOSA OSUCM,OSNA
 AME0.2   LDM    ME0U        UNCORRECTED MEMORY REGISTER LIST
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          CALL   CFF         CHECK FOR FREEZE
          LDM    RTP2
          ZJN    AME0.3      IF NOT TO IGNORE ERROR
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJN    AME0

 AME0.3   CALL   LOG
 AME0     LJM    AMEX        RETURN

 AME1     LDM    SUMS
          SHN    21-SSCE
          PJN    AME0        IF NOT A CORRECTED ERROR
          LDN    1
          STM    RLST        SET CORRECTED ERROR LIST FLAG

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = CORRECTED CM ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = CORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).

          SETDAC DDCM
          SETDAN (EPCO,DACME)
          SETFLG (BC.FL)
          LDM    ME0C        CORRECTED MEMORY ERROR REGISTERS
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          CALL   CFF
          LDM    RTP2
          ZJN    AME1.5      IF NOT TO IGNORE ERROR
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJP    AMEX

*         IN THE MODEL-DEPENDENT ROUTINES THAT FOLLOW
*         THE SYNDROME CODE AND THE ADDRESS BITS ARE
*         OBTAINED FROM THE CORRECTED ERROR LOG REGISTER
*         AND ARE STORED AT *SYCD* AND *SBER* RESPECTIVELY.

 AME1.5   LDM    CRFL        COST REDUCED FLAG
          ZJP    AME8

*         PROCESS CYBER 810/830 MEMORY ERRORS.

 AME2     RJM    GSC         GET SYNDROME CODE
          LDDL   W1
          STML   SBER+1      SAVE LOWER PORTION OF ADDRESS
          LDDL   W0
          LPC    0#1FF
          STML   SBER        SAVE UPPER PORTION OF ADDRESS
          CALL   SME         SERVICE MEMORY ERROR
          LJM    AMEX        RETURN

*         PROCESS CYBER 815/825 MEMORY ERRORS.

 AME8     RJM    GSC
          LDN    OIMR
          RJM    FMB
          CRDL   CM          GET OPTIONS INSTALLED
          LDDL   CM
          SHN    21-3
          MJN    AME9        IF 16 OR 32 MEGABYTES SET
          LDDL   W0
          LPN    7
          SHN    13D
          STML   SBER+1
          LDDL   W0
          LPC    0#FF
          SHN    -3
          STML   SBER
          LDDL   W1
          SHN    -3
          LMML   SBER+1
          STML   SBER+1
          CALL   SME
          LJM    AMEX        RETURN

 AME9     LDDL   W0
          LPC    0#FF
          STML   SBER
          LDDL   W1
          STML   SBER+1
          CALL   SME
          LJM    AMEX        RETURN

 GSC      SPACE  4,10
**        GSC - GET SYNDROME CODE.
*
*         ENTRY  (W0 - W3) = PROPER *CEL* REGISTER.
*
*         EXIT   (SYCD) = SYNDROME CODE.
*
*         USES   W0 - W3, *SYCD*.


 GSC      SUBR               ENTRY/EXIT
          LDN    0
          STM    SYCD

*         PROCESS CYBER 810/815/825/830 SYNDROME CODE.

          LDC    MCEL
          RJM    FMB
          CRDL   W0
          LDDL   W0
          SHN    21-17
          PJP    AMEX        IF NOT VALID BIT
          LDDL   W2          GET SYNDROME
          SHN    -8D
          STM    SYCD
          LJM    GSCX        RETURN
          LIST   X
*COPY CTP$DFT_SERVICE_MEMORY_ERROR
*COPY CTP$DFT_REWRITE_CM_ERROR
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (LOG ERRORS TO CENTRAL MEMORY BUFFERS)

**        ON CYBER 990 THERE IS SPECIAL HANDLING OF COMPARING MULTIPLE
*         RETRY ERRORS.

*COPYC CTP$DFT_LOG_ERROR
*COPY CTP$DFT_FIND_CONTROL_WORD
*COPY CTP$DFT_INCREMENT_ERROR_COUNT
*COPY CTP$DFT_LOG_ERROR_CHECK_MATCH
*COPYC CTP$DFT_LOG_ERROR_NON_990
*COPYC CTP$DFT_LOG_ERROR_NO_CONSOLE
*COPY CTP$DFT_ZERO_SUPPORTIVE_STATUS
*COPY  CTC$DFT_ELEMENT_CONVERSIONS
          QUAL    *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (GENERATE FAULT SYMPTOM CODE)

**        LOWER CYBER FAULT SYMPTOM CODES.

*COPYC CTP$DFT_GENERATE_FAULT_SYMPTOM
*COPY     CTP$DFT_GENERATE_NO_I4C_CODES

          ROUTINE I4S
          LJM    I4SX
          ROUTINE I4A
          LJM    I4AX
          ROUTINE I4I
          LJM    I4IX


          QUAL   *

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          LIST   *
          OVERLAY  (READ MAINTENANCE REGISTERS)
          QUAL   *           SO THAT OTHER OVERLAYS MAY ACCESS
 S1CC     SPACE  4,10
**        CYBER 810/830 PROCESSOR CORRECTED ERROR REGISTER LIST.


 S1CC     REGLST (10,00,12,30,93,90,91)
 S1CU     SPACE  4,10
**        CYBER 810/830 PROCESSOR UNCORRECTED ERROR REGISTER LIST.


 S1CU     REGLST (10,00,12,30,80,81)
 S1PC     SPACE  4,10
**        CYBER 815/825 PROCESSOR CORRECTED ERROR REGISTER LIST.


 S1PC     REGLST (10,00,12,30,90,93)
 S1PU     SPACE  4,10
**        CYBER 815/825 PROCESSOR UNCORRECTED ERROR REGISTER LIST.


 S1PU     REGLST (10,00,12,30,80)
 SXMA     SPACE  4,10
**        CYBER 810/815/825/830 MEMORY ERROR REGISTER LIST.


 SXMA     REGLST (10,00,12,20,A0,A4,A8,21)
 SXIU     SPACE  4,10
**        I1/I1CR CORRECTED AND UNCORRECTED IOU ERROR LIST.


 SXIU     REGLST (10,00,12,30,40,80,81,A0,18,21)
          LIST   X
*COPYC CTP$DFT_READ_MAINTENANCE_REGS
 ZSS      SPACE  4,10
**        ZSS - ZERO SUPPORTIVE STATUS.
*
*         NOTE   THIS ROUTINE IS INOPERATIVE ON A CYBER 180-810/815/825/830.


 ZSS      SUBR               ENTRY/EXIT
          UJN    ZSSX        RETURN
          QUAL   *

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          LIST   *
          OVERLAY  (PROCESSOR PRIMITIVES)

*COPY CTP$DFT_PROCESSOR_PRIMITIVES
 CP1      SPACE  4,10
**        CP1 - CLEAR ERRORS FOR P1 PROCESSORS
*
*         CALLS  HEP, *HEO*, *STP*, *STRBTS*.


          ROUTINE CP1

          LDM    HBUF+CPRPC
          STD    EC
          READMR RDATA,,DEMR *DEC* REGISTER
          CALL   STRBTS      SET MODEL-DEPENDENT *DEC* BITS
          WRITMR RDATA
          FUNCMR ,MRCE       CLEAR ERRORS
          CALL   HEO         HALF EXCHANGE OUT
          RJM    HEP         HALF EXCHANGE IN
          CALL   STP         HALT PROCESSOR
          READMR RDATA,,DEMR *DEC* REGISTER
          CALL   STRBTS      SET MODEL-DEPENDENT *DEC* BITS
          WRITMR RDATA
          FUNCMR ,MRCE       CLEAR ERRORS SECOND TIME
          CALL   HEO
          RJM    HEP
          LJM    CP1X        RETURN
 HEP      SPACE  4,10
**        HEP - HALF EXCHANGE IN FOR P1 PROCESSOR.
*
*         CALLS  CLRBTS.
*
*         MACROS FUNCMR, WRITMR.


 HEP      SUBR               ENTRY/EXIT
          LDM    OLSS
          LPN    0#20
          ZJN    HEP1        IF PROCESSOR IN JOB MODE
          LDML   HEIM
          UJN    HEP2        CONTINUE

 HEP1     LDML   HEIJ
 HEP2     STM    HEPB+7
          SHN    -10
          STM    HEPB+6
          FUNCMR HBUF+CPRPC,MRMC   MASTER CLEAR PROCESSOR
          RJM    CLRBTS      CLEAR MODEL-DEPENDENT *DEC* BITS
          WRITMR HEPB,HBUF+CPRPC,PCSA  SET *CSA*
          FUNCMR HBUF+CPRPC,MRSP  START PROCESSOR
          LDC    200D
 HEP3     SBN    1
          NJN    HEP3        DELAY
          LJM    HEPX        RETURN

 HEPB     BSSZ   10

 STRBTS   SPACE  4,10
**        STRBTS - STORE BITS IN *DEC*.


          ROUTINE STRBTS

*         PROCESS CYBER 810/815/825/830.

 SETBTP1  LDM    RDATA+2     SET PRESERVE PP EXCHANGES BIT
          SCN    0#8         PRESERVE PP EXCHANGE BIT
          LMN    0#8
          STM    RDATA+2
          LJM    STRBTSX     RETURN
 CLRBTS   SPACE  4,10
**        CLRBTS - RESTORE MODEL-DEPENDENT BITS IN *DEC*.
*
*         MACROS READMR, WRITMR.


 CLRBTS   SUBR               ENTRY/EXIT
          READMR RDATA,HBUF+CPRPC,DEMR  READ *DEC* REGISTER

*         PROCESS CYBER 810/815/825/830.

 CLRBTP1  LDM    RDATA+2     ENABLE EXCHANGE
          SCN    0#8
          STM    RDATA+2

          WRITMR RDATA,HBUF+CPRPC  REWRITE *DEC* REGISTER
          LJM    CLRBTSX     RETURN
*COPY CTP$DFT_MANAGE_MEMORY_PORT

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (MASSAGE CPU REGISTERS)
*COPY CTP$DFT_MASSAGE_CPU_REGISTERS

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (CLEAR ERRORS)
 CLE      SPACE  4,10
**        CLE - CLEAR ERRORS.
*
*         EXIT   ALL REGISTERS NECESSARY WILL BE CLEARED OF ERRORS.


          ROUTINE CLE

          LDM    HBUF+HDRPC
          STD    EC
          FUNCMR ,MRCE       CLEAR ERRORS FROM *PFS* REGISTERS
          LJM    CLEX        RETURN

 CCE      SPACE  4,10
**        CCE - CLEAR CM ERRORS.
*
*         CALLS  FMB, UPR.


          ROUTINE CCE


*         PROCESS LOWER 8XX MAINFRAMES.

 CCE2     LDM    RLST
          NJP    CCE4.5      IF CORRECTED ERROR

*         CLEAR UNCORRECTED ERROR LOG 1 AND 2.

          LDC    MUL1
          STD    RN
          RJM    FMB         GET MAINTENANCE BUFFER POINTER FOR REGISTER
          CRML   MRVAL,ON
          RJM    UPR         UNPACK TO (RDATA)
          LDM    RDATA
          SHN    21-7
          PJN    CCE4        IF VALID NOT SET
          LDM    RDATA
          LPN    0#3F        SAVE ALL BUT VALID, UNLOGGED BITS
          STM    RDATA
          WRITMR RDATA,HBUF+HDRPC
 CCE4     LDC    MUL2
          STD    RN          SET UP *UEL2* REGISTER
          RJM    FMB
          CRML   MRVAL,ON
          RJM    UPR
          LDM    RDATA
          SHN    21-7
          PJN    CCE4.1      IF VALID NOT SET
          LDM    RDATA
          LPN    0#3F        SAVE ALL BUT VALID, UNLOGGED BITS
          STM    RDATA
          WRITMR RDATA,HBUF+HDRPC
 CCE4.1   LJM    CCEX        RETURN

 CCE4.5   LDC    MCEL
          STD    RN          CORRECTED MEMORY ERROR REGISTER
          RJM    FMB
          CRML   MRVAL,ON
          RJM    UPR
          LDM    RDATA
          SHN    21-7
          PJN    CCE4.1      IF VALID NOT SET
          LDM    RDATA
          LPN    0#3F        SAVE ALL BUT VALID, UNLOGGED
          STM    RDATA
          WRITMR RDATA,HBUF+HDRPC
          LJM    CCEX        RETURN
          QUAL   *
          LIST   X
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (UPDATE C170 MEMORY)
*COPYC CTP$DFT_UPDATE_170_MEMORY

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_OS_REQUESTS
*COPYC CTP$DFT_OS_REQUESTS_NON_PACKETS
          QUAL   *
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS - 2)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_REQUEST_PROCESSOR_2

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (PP REQUEST PROCESSOR)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPY  CTP$DFT_PP_UTILITY_REQUESTS
*COPY  CTP$DFT_DUMP_PP_REGISTERS
*COPY  DSI$DUMP_LOAD_IDLE_PP

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (RESTART SCI PP)
 QUAL$    EQU    0
*COPYC CTP$DFT_RESTART_SCI
*COPY  DSI$DUMP_LOAD_IDLE_PP

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DFT ERROR LOGGING ROUTINES)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPY     CTP$DFT_PROCESS_DISK_ERROR

          OVERFLOW  R2ORG
          OVERLAY  (DFT RUN TIME ERROR HANDLING)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_RUN_TIME_ERROR_HANDLER
*copy     ctp$construct_message_in_eicb

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          END
/EOR
