          IDENT  DFT3,70B
          CIPPU  J
          MEMSEL 16
          BASE   MIXED
          TITLE  CTM$DFT UPPER 8XX CLASS (DFT3).
          COMMENT *SMD* LVL=11
          COMMENT COPYRIGHT CONTROL DATA SYSTEMS INC. 1992
 DFT      SPACE  4,10
***       DFT - DEDICATED FAULT TOLERANCE.
*         B. R. HANSON.      82/06/21. (PRECURSOR KNOWN AS SMU)
*         G. J. FALCONER.    85/08/05. (DFT V1.0)
*         G. J. FALCONER.    86/02/27. (DFT V2.0)
 DFT      SPACE  4,10
***       DFT PERFORMS:
*
*         1) CAPTURING THE CONTENT OF MAINFRAME MAINTENANCE REGISTERS
*         FOR ERROR LOGGING, AND CLEARING HARDWARE ELEMENT ERRORS.
*
*         3) THE ACTUAL SEQUENCE OF STEPS TO DEADSTART THE SYSTEM FROM
*         C170 STATE OPERATION TO DUAL-STATE OPERATION OR TO RETURN IT TO
*         STANDALONE C170 OPERATION.  THIS IS PERFORMED UPON THE REQUEST
*         OF THE PP BOOT (*VPB* STATE OF *SCI*).
*
*         4) PROVIDING EXTERNALIZATIONS OF *2AP* FUNCTIONS TO NOS/VE.
 CONTROL  SPACE  4,10
**        ASSEMBLY PARAMETERS.


 PRGM     SET    2           SET *OVERLAY* MACRO TO *DFT* NAMES
 PPTYPE   EQU    0           TURN ON TRACKING OF UPPER/LOWER PP
 MCH$     EQU    0           DEFINE *MCH* ROUTINE IN DSI$DUMP LOAD IDLE PP
*STEP$    SET    0           ASSEMBLE *STEP* CODE IF SYMBOL DEFINED

          LIST   X
*COPY     CTP$DFT_RELEASE_HISTORY
*COPY     CTH$DEDICATED_FAULT_TOLERANCE
          LIST   *
 COMMON   SPACE  4,10
**        COMMON DECKS.


*COPYC DSI$PP_MACROS
*COPYC DSI$MAINTENANCE_REGISTER_MACROS
*COPYC CTI$COMPASS_OS_LEVELS
*COPYC CTC$DFT_MACROS
*COPYC CTC$DFT_DIRECT_CELLS
*COPYC CTI$CONSOLE_PACKET_DEFINITIONS
*COPYC CTI$DFT_ANALYSIS_CODES
*COPY DSC$PP_MR_AND_TPM_CONSTANTS
*COPY CTC$DFT_CONSTANTS
*COPY CTC$DFT_ACTION_NO_OVERFLOW
*COPY DSA$HARDWARE_TABLE_DEFINITIONS
*COPY DSA$VE_REQUESTS_TO_DFT
          LIST   *
*COPY DSI$PP_INSTRUCTION_MNEMONICS
          LIST   X
*COPY CTC$EI_CONTROL_BLOCK
          LIST   *

**        START DEFINITION OF THE MAIN LOOP OF DFT.
*

*COPYC CTP$DFT_MAIN_LOOP
*COPYC CTP$DFT_MAIN_LOOP_PACKETS
*COPYC CTP$DFT_MAIN_LOOP_UPDATE_TIME
*COPYC CTP$DFT_MAIN_LOOP_DUAL_STATE
 CRN      SPACE  4,10
**        CRN - CHECK RELOCATION NECESSARY
*
*         STUB ON A UPPER 8XX

 CRN      SUBR               ENTRY/EXIT
          UJN    CRNX

**        END OF DFT MAIN LOOP DEFINITIONS

*COPYC CTC$DFT_GLOBAL_DATA
*COPYC CTC$DFT_GLOBAL_DATA_NON_S0
*COPYC CTP$DFT_RESIDENT_COMMON
*COPYC CTP$DFT_RESIDENT_ECM_NON_S0
*copy dsi$find_cip_module
*copy dsi$get_hardware_element
*COPYC CTP$MR_PROTOCOL_PREPROCESS
*COPYC CTP$MR_RETRY_OPERATION_FOR_DFT
*COPYC CTP$MR_PROTOCOL_PROCESS
*COPYC CTP$MR_PROTOCOL_POSTPROCESS
*copy DSI$PP_UTILITY_SUBROUTINES
          USE    PRESET
          QUAL   PRESET
*COPYC CTP$DFT_PRESET
*COPYC CTP$DFT_PRESET_DUAL_I4
*COPY CTP$DFT_RETURN_ERROR_CODE
 SPO      SPACE  4,10
**        SPO - SETUP MEMORY PORT OFFSET.
*
*         EXIT   PO IS SET TO THE MODEL DEPENDENT PORT OFFSET.
*
*         USES   PO.


 SPO      SUBR               ENTRY/EXIT
          LDN    4           SETUP MEMORY PORT OFFSET
          STD    PO
          UJN    SPOX        RETURN
          USE    *
          QUAL   *
          OVERLAY  (RESIDENT PART II),R2ORG
          QUAL   *
*COPYC CTP$DFT_RESIDENT_II_NON_990
*COPYC CTP$DFT_RESIDENT_II_COMMON
*COPYC CTP$DFT_NON_930_RESIDENT_II
*COPYC DSI$PACK_UNPACK_REGISTERS
*COPYC DSI$VALIDATE_PP_BOUNDS

          USE    OVERFLOW
          ERRNG  10000-*     RESIDENT II OVERFLOWS PP
*COPYC CTP$DFT_PRESET_DUAL_I4_OVL
*COPYC CTP$DFT_PRESET_BUILD_STRUCTURE
          OVERLAY (STANDARD PRESET OVERLAY ROUTINES)
*COPYC CTP$DFT_PRESET_STANDARD_OVL
 SSO      SPACE  4,10
**        SSO - PRESET  SPECIAL OVERLAY FOR IOU BIT 57 ERROR.
*         NON OPERATIONAL HERE.


 SSO      SUBR
          UJN    SSOX        RETURN

*COPY CTP$DFT_RETURN_ERROR_CODE
 SMV      SPACE  4,10
**        SMV - SETUP MODEL DEPENDENT VALUES.
*
*         *SMV* WILL SET UP REGISTER LIST ADDRESSES ON A MODEL DEPENDENT BASIS, AND
*         WILL INITIALIZE ALL MODEL DEPENDENT GLOBAL DATA.


 SMV      SUBR               ENTRY/EXIT
          LDC    SXIU        UNCORRECTED REG LIST FOR IOU
          STM    IO0U        SAVE LIST ADDRESS
          STM    IO0C
          LDM    IOUM
          LMN    0#20
          ZJN    SMV10       IF I2 IOU
          READMR RDATA,I0CC,OIMR  I4 PROCESSOR
          LDM    RDATA+7
          SHN    10D         CHECK BIT 56 FOR CIO PP PRESENT
          PJN    SMV10       IF NO CIO PPS PRESENT
          LDC    I4IU
          STM    IO0U        UNCORRECTED REGISTER LIST
          LDC    I4IC
          STM    IO0C        CORRECTED REGISTER LIST
 SMV10    LDC    SXMA        COMPLETE REGISTER LIST FOR MEMORY ERRORS
          STM    ME0U        UNCORRECTED MEMORY ERROR LIST
          STM    ME0C        CORRECTED MEMORY ERROR LIST
          LDC    S3PA        SET CORRECTED/UNCORRECTED REGISTER LISTS FOR CPU0
          STM    CP0C
          STM    CP0U
          LDM    CPU1M       CHECK IF CPU1 PRESENT
          ZJP    SMVX        IF CPU1 NOT PRESENT
          LDC    S3PA        SET CORRECTED/UNCORRECTED REGISTER LISTS FOR CPU1
          STM    CP1C
          STM    CP1U
          LJM    SMVX        RETURN
*COPY     CTP$DFT_CLEAR_PACKETS_I4
*COPYC CTP$DFT_PRESET_PACKETS
          OVERLAY  (MAIN NON-RESIDENT ROUTINES)

**        START OF THE MAIN NON RESIDENT ROUTINES OVERLAY. ON CYBER 835
*         THIS OVERLAY DEFINES ROUTINES FOR DUAL STATE, NON DUAL I4
*         NON HALT ON ERROR PROCESSING, AND NO PACKET COMMUNICATION.



*COPYC CTP$DFT_MAIN_NON_RES_RTNS
*COPY CTP$DFT_SET_SS_DUAL_I4
*COPYC CTP$DFT_MAIN_NON_RES_DUAL_I4
*COPYC CTP$DFT_MAIN_NON_RES_EICB_TIME
*COPYC CTP$DFT_MAIN_NON_RES_DUAL_STATE
*COPY CTP$DFT_CHECK_TPM_PKT_RESPONSE
*COPYC CTP$DFT_MANAGE_PACKET_TRAFFIC
 BCA      SPACE  4,10
**        BCA - HANDLE BLOCKED CM ACCESS.
*         THIS IS VALID ON A MODEL 44, 43 IOU ONLY. (STUB HERE)
          QUAL   HB57


 BCA      SUBR
          UJN    BCAX        RETURN
 BI57     CON    0           DUMMY FLAG
          QUAL   *

 HOE      SPACE  4,10
**        HOE - HALT ON ERROR
*
*         STUB ON AN UPPER 8XX


          ROUTINE HOE
          LJM    HOEX

 ERR      CALL   ROS         REPORT OS ERROR

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (AUX MAIN NON RESIDENT ROUTINES)
*COPYC CTP$DFT_CPU_HANDSHAKER
          ROUTINE ROS
          LJM    ERR
*COPY CTP$DFT_PREPARE_FOR_CIP_CALL
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_LOG_PACKET_TIMEOUT

 RED      SPACE  4,10
**        RED - READ 960 POWER MONITOR.
*
*         ON ANY MACHINE OTHER THAN THE 960 THIS ROUTINE IS
*         NON FUNCTIONAL.


          ROUTINE RED
          LJM    REDX

          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY  (DO DFT ACTIONS)

*COPYC CTP$DFT_ACTION_LIST
*COPYC CTP$DFT_ACTION_LIST_OVERFLOW
*COPYC CTP$DFT_ACTION_LIST_DUAL_I4
*COPYC CTP$DFT_ACTION_LIST_DUAL_STATE

 DDCM     BSS    0           CLEAR CM ERROR
          TASK   (CCE)

 DDCE     BSS    0           CLEAR UPPER 8XX PROCESSOR ERRORS
          TASK   (CLE,SPR)
*COPYC CTP$DFT_RETURN_TASK_ERROR
          QUAL   *
          QUAL   ABC
*COPY CTP$DFT_RETURN_ERROR_CODE
          QUAL   *

          QUAL   *


          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (DFT SEND PACKETS OVERLAY)
*COPYC CTP$DFT_CHECK_PKTS_FOR_NON_S0
*COPYC CTP$DFT_CHECK_PKT_STATUS_NON_S0
*COPYC CTP$DFT_SEND_PACKET_ALL
*COPY  CTP$DFT_SEND_PACKET_FOR_NON_S0
*COPY  CTP$DFT_CLEAR_PACKETS_I4

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY (SAVE PP REGISTERS IN CENTRAL MEMORY)
*COPYC CTP$DFT_SAVE_PP_REGISTERS
*COPY  CTP$DFT_DUMP_PP_REGISTERS
 QUAL$    EQU    1
*COPY  DSI$DUMP_LOAD_IDLE_PP
          OVERFLOW R2ORG     CHECK FOR OVERFLOW
          OVERLAY (DFT ERROR CONTROL OVERLAY)
*COPYC CTP$DFT_ERROR_CONTROL

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY (LOG TOP OF HOUR COUNTERS)

*COPYC CTP$DFT_LOG_COUNTERS
 RMC      SPACE  4,10
**        RMC - RESET MODEL DEPENDENT COUNTERS.
*


          ROUTINE RMC        ENTRY/EXIT
          LJM    RMCX
 RMCF     BSS    0
*COPY     CTP$DFT_RESET_PIT
*COPY     CTP$DFT_TEST_DLD_PATH

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (ENVIRONMENT/SHORT WARNING PROCESSORS)

**        THIS OVERLAY HAS A STUBBED REFERENCE TO CHECK IF THE CONSOLE IS ALIVE.
*         ON CYBER 835 THIS MECHANISM IS NOT USED. THE STUB REPORTS THE CONSOLE IS ALIVE.

*COPYC CTP$DFT_ENVIRONMENT_RTNS
*COPY  CTP$DFT_FIND_WARNING_IN_NRSB
 CCA      SUBR
          LDN    1
          UJN    CCAX        REPORT CONSOLE ALIVE ON NON S0 MACHINE
          QUAL   *

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (ANALYSE PROCESSOR ERRORS)
 APE      SPACE  4,10
**        APE - ANALYSE PROCESSOR ERRORS.
*
*         CALLS  BRL, CID, CFC, CLR, PAC, SCS, SSE, *AP3*, *CFF*, *LOG*, *RMR*,
*                *STP*, *SWP*.


          ROUTINE APE

          LDN    0
          STM    NERR        SET NO ERROR FLAG FALSE

*         IT IS NECESSARY TO SAVE THE PREHALT STATUS SUMMARY BECAUSE
*         HALTING THE PROCESSOR WILL SET THIS BIT.

          LDM    SUMS        SUMMARY STATUS
          STM    OLSS        SAVE PRE-HALT PROCESSOR SUMMARY STATUS
          SHN    21-SSSW     SHORT WARNING
          PJN    APE0        IF NO SHORT WARNING
          CALL   SWP         CALL SHORT WARNING PROCESSOR
          LJM    APEX        RETURN

 APE0     RJM    CTE         CHECK THRESHOLD EXCEEDED
          NJP    APEX        IF THRESHOLD EXCEEDED IGNORE ERROR
          CALL   CFF         CHECK FOR FREEZE
          LDM    RTP2
          ZJN    APE0.5      IF NOT TO IGNORE ERROR
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJP    APEX

 APE0.5   LDN    0
          RJM    SCS         SAVE PRE-HALT CONTROL STORE ADDRESS
          CALL   STP         CALL STOP PROCESSOR
          LDM    CPUO
          STM    CPUH        HALTED CPU ORDINAL
          LDN    1
          RJM    SCS         SAVE AFTER HALT CONTROL STORE ADDRESS

*         DISABLE *PFS* AND BLOCK EXCHANGE REQUEST BITS SET IN *DEC*.

          LDN    BC
          RJM    CLR
          LDM    OLSS
          SHN    21-SSPH     PROCESSOR HALT IN SUMMARY STATUS
          PJP    APE10       IF PROCESSOR NOT HALTED
          LDML   CSAR
          STDL   RN
          LDM    CPUH        CPU ORDINAL
          NJN    APE1        IF CPU 1
          LDML   CP0CC       CPU 0 CONNECT CODE
          UJN    APE2

 APE1     LDML   CP1CC       CPU 1 CONNECT CODE
 APE2     STDL   EC
          READMR RDATA
          LDML   RDATA+7
          LMC    0#49
          ZJN    APE4        IF POSSIBLE CLASS II ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PROCESSOR HALT CLASS I.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).

 APE3     SETDAC DDDC
          SETDAN (EPUN,DAPH)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          LJM    APE7

 APE4     LDM    OLSS
          LPN    0#20
          ZJN    APE3        IF CLASS I ERROR
          LDM    OLSS
          LPN    4
          NJP    APE3        IF DUE SET THEN CLASS I ERROR
          LDC    PMCR        MONITOR CONDITION REGISTER
          STDL   RN
          READMR RDATA
          RJM    PAC         PACK TO *MRVAL*
          LDML   MRVAL+3
          LPC    0#5B4C
          ZJP    APE3        IF NO MCR BITS SET MUST BE CLASS I
          LDC    PTPE        TRAP ENABLES REGISTER
          STDL   RN
          READMR RDATA
          LDML   RDATA+7
          NJP    APE3        IF CLASS I ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PROCESSOR HALT CLASS II.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).

          SETDAC DDDC
          SETDAN (EPUN,DASWH)
          SETFLG (BC.FV7,BC.FV8,BC.FL)

 APE7     LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE8
          LDM    CP0U        GET UNCORRECTED REGISTER LIST FOR CPU0
          UJN    APE9        CONTINUE

 APE8     LDM    CP1U        GET UNCORRECTED REGISTER LIST FOR CPU1
 APE9     RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LJM    APE19       CONTINUE PROCESSING

 APE10    LDM    SUMS        SUMMARY STATUS
          SHN    21-SSUE     UNCORRECTED ERROR
          PJP    APE13       IF NOT UNCORRECTED ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED PROCESSOR ERROR.
*                                  = NO ACTION (VERSION 4).

          SETDAN (EPUN,DAUPE)
          SETFLG (BC.FL)
          SETOSA OSUPE,OSNA
          LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE11
          LDM    CP0U        GET UNCORRECTED REGISTER LIST FOR CPU0
          UJN    APE12       CONTINUE

 APE11    LDM    CP1U        GET UNCORRECTED REGISTER LIST FOR CPU1
 APE12    RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LJM    APE19       CONTINUE PROCESSING

 APE13    LDM    SUMS        SUMMARY STATUS
          SHN    21-SSCE     CORRECTED ERROR
          PJP    APE16       IF NOT CORRECTED ERROR
          LDM    OLSS        GET SAVED STATUS SUMMARY
          SHN    21-SSPH
          MJP    APE16       IF PROCESSOR HALT

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = CORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = CORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).

          SETDAN (EPCO,DACPE)
          SETFLG (BC.FL)
          LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE14
          LDM    CP0C        GET CORRECTED REGISTER LIST FOR CPU0
          UJN    APE15       CONTINUE

 APE14    LDM    CP1C        GET CORRECTED REGISTER LIST FOR CPU1
 APE15    RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          LJM    APE19       CONTINUE PROCESSING


*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED PROCESSOR ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED PROCESSOR ERROR.
*                                  = NO ACTION (VERSION 4).

 APE16    SETDAN (EPUN,DAUPE)
          SETFLG (BC.FL)
          SETOSA OSUPE,OSNA
          LDM    CPUH        GET ORDINAL OF CPU BEING PROCESSED
          NJN    APE17       IF CPU1
          LDM    CP0U        GET UNCORRECTED REGISTER LIST FOR CPU0
          UJN    APE18       CONTINUE

 APE17    LDM    CP1U        GET UNCORRECTED REGISTER LIST FOR CPU1
 APE18    RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
 APE19    RJM    CFC         CHECK FOR FATAL CONTROLWARE PARITY ERROR
          CALL   AP3         CHECK FOR P3 SPECIAL CASE
          LDM    RTP2        GET FLAG INDICATING CASE COND. MET
          NJP    APEX        IF MET CONSIDER AS NOT AN ERROR

          LDM    DFTA
          LMC    DDDC
          ZJN    APE20       IF DISABLE CPU
          SETDAC (DDCE)

 APE20    LDM    CPUO
          RJM    SSE         SET SECONDARY ELEMENT IDENTIFIER
          RJM    CID         CHECK IF CPU DEGRADABLE
          CALL   LOG
          LJM    APEX        RETURN
 CFC      SPACE  4,10
**        CFC - CHECK FOR CONTROLWARE PARITY ERROR.
*
*         ENTRY  REGISTERS READ IN SCRATCH BUFFER
*
*         EXIT   DFT ANALYSIS CHANGED IF CONDITION MET.
*
*         CALLS  FMB.
*
*         USES   W0 - W3.


 CFC      SUBR               ENTRY/EXIT
          LDC    EIMR
          RJM    FMB
          CRDL   W0          READ IN ELEMENT ID REGISTER
          LDDL   W3
          ADC    -0#301
          PJN    CFCX        IF SERIAL NUMBER >= 301 NO PROBLEM
          LDC    PPFS+6      PFS REGISTER 86
          RJM    FMB
          CRDL   W0          READ IN PFS REGISTER 86
          LDDL   W1
          LPC    0#CC        BITS 24,25,28,29
          ZJN    CFCX        IF NOT FATAL ERROR
          LDC    PPFS        REGISTER 80
          RJM    FMB         FIND REGISTER IN SCRATCH BUFFER
          CRDL   W0
          LDDL   W0          BIT 1
          SHN    3
          PJN    CFCX        IF NOT FATAL ERROR
          LDDL   W0
          SHN    2
          MJN    CFCX        IF NOT FATAL ERROR
          LDDL   W2
          LPN    1           BIT 47
          NJP    CFCX        IF NOT FATAL ERROR
          LDDL   W2
          LPC    0#40        BIT 41
          NJP    CFCX

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = FATAL CONTROLWARE PARITY ERROR.
*         DFT ANALYSIS - DFT ACTION = DISABLE CPU.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).

          SETDAC DDDC
          SETDAN (EPUN,DAFCE)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          LJM    CFCX
 AP3      SPACE  4,10
**        AP3 - ANALYSE P3 SPECIAL CASE CONDITION.
*
*         METHOD IF ERROR IS ONLY CORRECTED AND BIT 1 IN REG 80 AND
*                BIT 45 IN REG 86 ARE ONLY ONES SET THEN ACTION
*                FOR DFT IS TO IGNORE THE ERROR.
*
*         ENTRY  REGISTERS HAVE BEEN LOGGED IN THE MAINTENANCE REGISTER
*                SCRATCH BUFFER
*
*         EXIT   RTP2 = 0 IMPLIES CONDITIONS NOT MET, RTP2 = 1 IMPLIES
*                CONDITIONS MET.

          ROUTINE AP3
          LDN    1
          STM    RTP2        INITIALIZE TO CONDITIONS MET
          LDM    SUMS        SUMMARY STATUS
          LPBC   (SSUE,SSPH) CHECK UNCORRECTED ERROR PROC HALT
          NJP    AP38        IF EITHER SET
          LDM    SUMS
          SHN    21-SSCE     CORRECTED ERROR
          PJP    AP38        IF NOT A CORRECTED ERROR
          LDN    0#89-0#80
          STD    T1          COUNT OF REGISTERS TO SCAN
          LDC    PPFS        PFS REG 80 TO START AT
          STD    T2
 AP31     LDD    T2          GET CURRENT REGISTER
          RJM    FMB         FORM POINTER TO REGISTER
          CRDL   W0          GET REGISTER
          LDD    T2
          LMC    PPFS
          NJN    AP32        IF NOT PFS REG 80
          LDDL   W0          GET TO BIT 1
          SHN    21-16
          PJP    AP38        IF NOT SET
 AP33     LDDL   W0
          LPC    0#BFFF
          NJP    AP38        IF ANY OTHER BITS SET EXIT
          LDN    0
          UJN    AP36        CHECK REST OF REGISTER

 AP32     LDD    T2          CURRENT REGISTER
          LMC    PPFS+6
          NJN    AP35        IF NOT PFS REG 86
          LDDL   W2
          SHN    21-2        BIT 45
          NJN    AP34        IF SET
          UJN    AP38        IF NOT SET EXIT

 AP34     LDDL   W2
          LPC    0#FFFB      ALL BUT BIT 45
          NJN    AP38        IF ANY OTHERS SET EXIT
          LDN    0
          ADDL   W0          CHECK REST OF WORD
          ADDL   W1
          UJN    AP37        CONTINUE

 AP35     LDN    0
          ADDL   W0
 AP36     ADDL   W1
          ADDL   W2
 AP37     ADDL   W3
          NJN    AP38        IF ANYTHING ELSE SET EXIT
          AOD    T2          MOVE ON TO NEXT REGISTER TO EXAMINE
          SOD    T1          DECREMENT COUNT OF REGISTERS TO SCAN
          PJP    AP31        IF MORE TO DO
          SETDAC (DDCE)      ACTION TO CLEAR ERRORS
          LJM    AP3X        RETURN

 AP38     LDN    0
          STM    RTP2        SET FLAG TO SAY CONDITIONS NOT MET
          LJM    AP3X        RETURN

*COPY     CTP$DFT_SAVE_CONTROL_STORE
*COPY CTP$DFT_CHECK_CPU_THRESHOLD
*COPY     CTP$DFT_CHECK_DEGRADABLE_CPU
          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY (ANALYZE IOU ERRORS

          ROUTINE AIE

          LDM    IOUM
          LMN    0#20
          NJN    AIE10       IF NOT I2 IOU
          CALL   AIE2
          UJP    AIEX

 AIE10    CALL   AIE4        IF I4 IOU
          UJP    AIEX

          QUAL   AI2
          ROUTINE AIE2
          CALL   /AI2/AIE
          LJM    AIE2X
*COPYC CTP$DFT_ANALYZE_IOU_ERRORS

          QUAL   *
          QUAL   AI4
          ROUTINE AIE4
          CALL   /AI4/AIE
          LJM    AIE4X
*COPYC CTP$DFT_ANALYZE_IOU_ERRORS_I4
*COPYC CTP$DFT_PROCESS_DUAL_I4_IOU_ERR
*COPY CTP$DFT_SET_SS_DUAL_I4
 CEE      SPACE  4,10
**        CEE - CHECK FOR EXPECTED IOU ERROR
*
*         STUB ON UPPER 8XX CLASS

 CEE      SUBR               ENTRY/EXIT
          LDN    0           PRESET TO NOT EXPECT AN ERROR
          UJN    CEEX        RETURN
          QUAL   *

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (ANALYSE MEMORY ERRORS)
 AME      SPACE  4,10
**        AME - PROCESS MEMORY ERRORS.
*
*         CALLS  CLR, GSC, FMB, *CFF*, *LOG*, *SME*.


          ROUTINE AME

          LDN    0
          STM    RLST        CORRECTED ERROR FLAG
          STM    NERR        SET NO ERROR FLAG FLAG
          STML   SBER
          STML   SBER+1
          STML   SYCD
          LDN    BC
          RJM    CLR         ZERO SCRATCH BUFFER
          LDM    ME0U        MERGED MEMORY ERROR REGISTER LISTS
          RJM    BRL         BUILD REGISTER LIST
          CALL   RMR         READ REGISTERS
          CALL   CFF         CHECK FOR FREEZE
          LDM    RTP2
          ZJN    AME0.1      IF NOT TO IGNORE ERRORS
          LDN    0
          STM    DFTA        NO ACTION
          STM    REGI        RESET REGISTER LIST INDEX
          UJP    AMEX

 AME0.1   LDM    SUMS        SUMMARY STATUS
          SHN    21-SSUE
          PJP    AME5        IF NOT UNCORRECTED
          LDC    MUL2
          RJM    FMB         FIND REGISTER IN SCRATCH BUFFER
          CRDL   W0          READ IN UEL2 REGISTER
          LDM    MEMM
          LMC    0#30
          NJP    AME1        IF MODEL 31 MEMORY
          LDD    W0
          LPC    0#B0
          LMC    0#A0        BIT 0, 2 SET, BIT 3 CLEAR
          NJP    AME2        IF NOT PARTIAL WRITE PARITY ERROR

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = PARTIAL WRITE PARITY ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).
*         DFT ANALYSIS - OS ACTION = MULTIPLE ODD BIT ERROR.
*                                  = STEP SYSTEM (VERSION 4).

 AME0     SETDAC DDCM
          SETDAN (EPUN,DAPWP)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          SETOSA OSMOB,OSSS
          UJP    AME3        LOG THE ERROR

 AME1     LDDL   W0
          SHN    2
          PJN    AME2        IF NOT VALID ERROR
          LDDL   W2
          LPC    0#3FC
          NJN    AME2        IF NOT PARTIAL WRITE PARITY ERROR
          LDD    W2
          LPN    3
          NJP    AME0        IF PARTIAL WRITE PARITY ERROR
          LDD    W3
          LPC    0#FC00
          NJP    AME0        IF PARTIAL WRITE PARITY ERROR


*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = UNCORRECTED CM ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = UNCORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = VALID 170, VALID 180, LOG (OS).
*         DFT ANALYSIS - OS ACTION = UNCORRECTED MEMORY ERROR.
*                                  = NO ACTION (VERSION 4).

 AME2     SETDAC DDCM
          SETDAN (EPUN,DAUME)
          SETFLG (BC.FV7,BC.FV8,BC.FL)
          SETOSA OSUCM,OSNA
 AME3     CALL   LOG
 AME4     LJM    AMEX        RETURN

 AME5     LDM    SUMS
          SHN    21-SSCE
          PJN    AME4        IF NOT A CORRECTED ERROR
          LDN    1
          STM    RLST        SET CORRECTED ERROR LIST FLAG

*         SET UP SCRATCH BUFFER CONTROL WORD.
*
*         DFT ANALYSIS - ANALYSIS = CORRECTED CM ERROR.
*         DFT ANALYSIS - DFT ACTION = CLEAR MEMORY ERROR.
*         DFT ANALYSIS - ERROR PRIORITY = CORRECTED ERROR.
*         DFT ANALYSIS - FLAGS = LOG (OS).

          SETDAC DDCM
          SETDAN (EPCO,DACME)
          SETFLG (BC.FL)

          LDM    MEMM        MEMORY MODEL
          LMN    0#30
          NJP    AME6        IF NOT 845,855

*         PROCESS CYBER 845/855 MEMORY ERRORS.

          RJM    GSC         GET SYNDROME CODE
          LDDL   W2
          SHN    -14D
          STML   SBER+1      LOWER ADDRESS BITS 32 - 33
          LDDL   W1
          LPC    0#3FFF
          SHN    2
          RAML   SBER+1      BITS 18 - 31 OF ADDRESS
          LDDL   W1
          SHN    -14D
          STML   SBER        BITS 16 - 17 OF ADDRESS
          LDDL   W0
          LPN    7           BITS 13 - 15  OF ADDRESS
          SHN    2
          RAML   SBER
          CALL   SME         SERVICE MEMORY ERROR
          LJM    AMEX        RETURN

 AME6     BSS    0

*         PROCESS CYBER 840/850/860 MEMORY ERRORS.

          RJM    GSC
          LDDL   W0
          LPC    0#FF        BITS 8 - 15
          SHN    2
          STML   SBER
          LDDL   W1
          SHN    -14D        BITS 16 - 17
          RAML   SBER
          LDDL   W1
          SHN    2           BITS 18 - 31
          STML   SBER+1
          LDDL   W2
          SHN    -14D        BITS 32 - 33
          RAML   SBER+1
          CALL   SME
          LJM    AMEX        RETURN
 GSC      SPACE  4,10
**        GSC - GET SYNDROME CODE.
*
*         ENTRY  (W0 - W3) = PROPER *CEL* REGISTER.
*
*         EXIT   (SYCD) = SYNDROME CODE.
*
*         USES   W0 - W3, *SYCD*.


 GSC      SUBR               ENTRY/EXIT
          LDN    0
          STM    SYCD

*         PROCESS CYBER 840/845/850/855/860 SYNDROME CODE.

 GSC2     LDC    MCEL        READ CORRECTED ERROR LOG REGISTER
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRDL   W0
          LDDL   W0
          SHN    21-17
          PJP    AMEX        IF VALID BIT NOT SET
          LDDL   W2
          LPN    77          BITS 0 - 5
          SHN    2
          STML   SYCD        SAVE WHOLE SYNDROME
          LDDL   W3
          SHN    -14D        BITS 6 - 7 OF SYNDROME
          RAML   SYCD
          LJM    GSCX        RETURN

*COPY CTP$DFT_SERVICE_MEMORY_ERROR
*COPY CTP$DFT_REWRITE_CM_ERROR
          QUAL   *

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (LOG ERRORS TO BUFFER CONTROL WORDS)

**        ON CYBER 990 THERE IS SPECIAL HANDLING OF COMPARING MULTIPLE
*         RETRY ERRORS.


 QUAL$    EQU    0           DEFINE UNQUALIFIED COMMON DECKS
*COPYC CTP$DFT_LOG_ERROR
*COPY CTP$DFT_LOG_ERROR_CHECK_MATCH
*COPYC CTP$DFT_LOG_ERROR_NON_990
*COPYC CTP$DFT_LOG_ERROR_NO_CONSOLE
*COPY CTP$DFT_ZERO_SUPPORTIVE_STATUS
*COPY CTP$DFT_INCREMENT_ERROR_COUNT
*COPY  CTP$DFT_FIND_WARNING_IN_NRSB
*COPY CTP$DFT_FIND_CONTROL_WORD
*COPY CTC$DFT_ELEMENT_CONVERSIONS
          QUAL   *

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (GENERATE FAULT SYMPTOM CODE)

**        CYBER 840/845/850/855/860 FAULT SYMPTOM CODES.

*COPYC CTP$DFT_GENERATE_FAULT_SYMPTOM
*COPY     CTP$DFT_WRITE_FSC_TO_BUFFER

          ROUTINE I4S        NOT DEFINED ON NON 960 APPLICATIONS
          LJM    I4SX
          ROUTINE I4I        NOT DEFINED ON NON MODEL 44 IOU
          LJM    I4IX
          QUAL   *
          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (MODEL 40 IOU FSC)
 I4A      SPACE  4,10
**        I4A - INTERFACE TO I4A FSC COMMON DECK.
*


          ROUTINE  I4A

          LDDL   BC+BCDA     GET ANALYSIS TO LOG
          SHN    -BC.ANP
          SBN    EPEN
          PJP    I4A2        IF ENVIRONMENT WARNING
          LDML   CPU0M       CPU0 MODEL NUMBER
          STML   CDIF
          LDC    IFS1
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+1,ON
          LDC    IFS2
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   CDIF+5,ON
          LDN    OIMR
          RJM    FMB         FIND REGISTER IN MAINTENANCE REGISTER SCRATCH
          CRDL   W0
          LDDL   W3
          SHN    21-7
          PJN    I4A0        IF NO CIO PPS PRESENT
          LDC    CIFS1
          RJM    FMB         FIND REGISTER IN MAINTENANCE REGISTER SCRATCH
          CRML   CDIF+9D,ON
          LDC    CIFS2
          RJM    FMB         FIND REGISTER IN MAINTENANCE REGISTER SCRATCH
          CRML   CDIF+13D,ON
 I4A0     LDC    CDIF        FWA OF INTERFACE BUFFER
          RJM    /IOUFLT0/IOUFLT0
 I4A1     LDC    2RDI        IOU ELEMENT IDENTIFIER
          ADM    IOUO        INCREMENT BY IOU ORDINAL
          RJM    WFS         WRITE FAULT SYMPTOM CODE TO SUPPORTIVE STATUS
          UJP    I4AX        RETURN

 I4A2     LDN    3
          STD    T1
 I4A3     LDML   I4AA,T1     GET CANNED ENVIRONMENT FAULT SYMPTOM CODE
          STML   CDIF,T1     STORE IN OUTPUT BUFFER
          SOD    T1
          PJN    I4A3        IF NOT DONE
          UJN    I4A1        LOG THE FAULT CODE

 I4AA     DATA   H*701     *


*copy     ctp$convert_digits_to_ascii
*copy     ctp$dft_model_40_iou_fsc
*copy     ctp$dft_write_fsc_to_buffer

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW

          OVERLAY  (READ MAINTENANCE REGISTERS)
          QUAL   *           SO THAT OTHER OVERLAYS MAY ACCESS
 S3PA     SPACE  4,10
**        CYBER 840/845/850/855/860 PROCESSOR CORRECTED/UNCORRECTED ERROR
*         REGISTER LIST.


 S3PA     REGLST (10,00,12,30,80,81,82,83,84,85,86,87,88,89)

 SXMA     SPACE  4,10
**        UPPER 8XX CYBER MEMORY ERROR REGISTER LIST.


 SXMA     REGLST (10,00,12,20,A0,A4,A8,21)
 SXIU     SPACE  4,10
**        I2 CORRECTED AND UNCORRECTED IOU ERROR LIST.


 SXIU     REGLST (10,00,12,30,40,80,81,A0,18,21)
 I4IC     SPACE  4,10
**        I4 CORRECTED IOU ERROR LIST.


 I4IC     REGLST (10,00,12,30,40,80,81,A0,18,21,16,34,44,84,85,A4,1C,25)
 I4IU     SPACE  4,10
**        I4 UNCORRECTED IOU ERROR LIST.


 I4IU     REGLST (10,00,12,30,40,80,81,A0,18,21,16,34,44,84,85,A4,1C,25)
*COPYC CTP$DFT_READ_MAINTENANCE_REGS
*COPY CTP$DFT_ZERO_SUPPORTIVE_STATUS
          QUAL   *

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (PROCESSOR PRIMITIVES)

*COPY CTP$DFT_PROCESSOR_PRIMITIVES

 STRBTS   SPACE  4,10
**        STRBTS - STORE BITS IN *DEC*.
*
*         NOT USED ON UPPER 8XX CLASSES


          ROUTINE STRBTS
          LJM    STRBTSX

 CLRBTS   SPACE  4,10
**        CLRBTS - RESTORE MODEL-DEPENDENT BITS IN *DEC*.
*
*         NOT USED ON UPPER 8XX CLASSES


 CLRBTS   SUBR               ENTRY/EXIT
          UJN    CLRBTSX
*COPY CTP$DFT_MANAGE_MEMORY_PORT

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (MASSAGE CPU REGISTERS)
*COPY CTP$DFT_MASSAGE_CPU_REGISTERS

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (CLEAR ERRORS)
 CLE      SPACE  4,10
**        CLE - CLEAR ERRORS.
*
*         EXIT   ALL REGISTERS NECESSARY WILL BE CLEARED OF ERRORS.


          ROUTINE CLE

          LDM    HBUF+HDRPC
          LPC    7417
          STD    EC
          FUNCMR ,MRCE       CLEAR ERRORS FROM *PFS* REGISTERS
          LJM    CLEX        RETURN

 CCE      SPACE  4,10
**        CCE - CLEAR CM ERRORS.
*
*         CALLS  FMB, UPR.


          ROUTINE CCE


*         PROCESS UPPER 8XX MAINFRAMES.

 CCE2     LDM    RLST
          NJP    CCE4.5      IF CORRECTED ERROR

*         CLEAR UNCORRECTED ERROR LOG 1 AND 2.

          LDC    MUL1
          STD    RN
          RJM    FMB         GET MAINTENANCE BUFFER POINTER FOR REGISTER
          CRML   MRVAL,ON
          RJM    UPR         UNPACK TO (RDATA)
          LDM    RDATA
          SHN    21-7
          PJN    CCE4        IF VALID NOT SET
          LDM    RDATA
          LPN    0#3F        SAVE ALL BUT VALID, UNLOGGED BITS
          STM    RDATA
          WRITMR RDATA,HBUF+HDRPC
 CCE4     LDC    MUL2
          STD    RN          SET UP *UEL2* REGISTER
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   MRVAL,ON
          RJM    UPR
          LDM    RDATA
          SHN    21-7
          PJN    CCE4.1      IF VALID NOT SET
          LDM    RDATA
          LPN    0#3F        SAVE ALL BUT VALID, UNLOGGED BITS
          STM    RDATA
          WRITMR RDATA,HBUF+HDRPC
 CCE4.1   LJM    CCEX        RETURN

 CCE4.5   LDC    MCEL
          STD    RN          CORRECTED MEMORY ERROR REGISTER
          RJM    FMB         FIND MAINTENANCE REGISTER IN SCRATCH BUFFER
          CRML   MRVAL,ON
          RJM    UPR
          LDM    RDATA
          SHN    21-7
          PJN    CCE4.1      IF VALID NOT SET
          LDM    RDATA
          LPN    0#3F        SAVE ALL BUT VALID, UNLOGGED
          STM    RDATA
          WRITMR RDATA,HBUF+HDRPC
          LJM    CCEX        RETURN
          QUAL   *

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (UPDATE C170 MEMORY)
*COPYC CTP$DFT_UPDATE_170_MEMORY

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_OS_REQUESTS
*COPYC CTP$DFT_OS_REQUESTS_PACKETS

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS - DUAL I4)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_REQUESTS_DUAL_I4
*COPY CTP$DFT_CHECK_TPM_PKT_RESPONSE

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS FOR IOU1)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_REQUESTS_IOU1_DUAL_I4

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (DFT REQUEST PROCESSORS - 2)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_REQUEST_PROCESSOR_2

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (PP REQUEST PROCESSOR)
*COPY CTP$DFT_RETURN_ERROR_CODE
*COPYC CTP$DFT_PP_UTILITY_REQUESTS
*COPY  CTP$DFT_DUMP_PP_REGISTERS
*COPY  DSI$DUMP_LOAD_IDLE_PP

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          OVERLAY  (DFT ERROR LOGGING ROUTINES)
*COPY     CTP$DFT_PROCESS_DISK_ERROR
*COPY CTP$DFT_RETURN_ERROR_CODE

          OVERFLOW  R2ORG
          OVERLAY  (RESTART SCI PP)
 QUAL$    EQU    0
*COPYC CTP$DFT_RESTART_SCI
*COPY DSI$DUMP_LOAD_IDLE_PP
          OVERFLOW R2ORG     CHECK FOR OVERFLOW

          OVERLAY  (DFT RUN TIME ERROR HANDLING)
*COPYC CTP$DFT_RUN_TIME_ERROR_HANDLER
*COPY CTP$DFT_RETURN_ERROR_CODE
*copy     ctp$construct_message_in_eicb

          OVERFLOW  R2ORG    CHECK FOR OVERFLOW
          END
/EOR
