          EJECT
*         CTEXT  CTP$DFT_MANAGE_MEMORY_PORT
*
*         THIS DECK ENABLES OR DISABLES MEMORY PORTS FOR
*         PROCESSORS.
*         NOTE:  IF HCM$ IS DEFINED THE CPUS WILL BE HALTED
*                BEFORE ANY MEMORY REGISTER IS WRITTEN.
 EMP      SPACE  4,10
**        EMP - ENABLE MEMORY PORT.
*
*         ENTRY  (HBUF) = PROCESSOR INFORMATION.


          ROUTINE EMP        ENTRY/EXIT
          IF     DEF,HCM$
          RJM    HAC         HALT ALL CPUS
          ENDIF
          LOCKMR SET
          READMR RDATA,CMCC,ECMR  READ MEMORY ENVIRONMENT CONTROL

 EMP2     LDC    SHNI+4+3    GENERATE SHIFT INSTRUCTION
          SBM    HBUF+CPRPORT GET MEMORY PORT
          STM    EMPA        FORM SHIFT COUNT TO PORT DISABLE BIT
          LDN    1
 EMPA     SHN    4+**
          LMC    0#FF
          LPML   RDATA,PO    CLEAR PORT DISABLE BIT FOR THIS PROCESSOR
          STM    RDATA,PO

          FUNCMR HBUF+CPRPC,MRMC   MASTER CLEAR THE PROCESSOR
          WRITMR RDATA,CMCC  REWRITE *EC* REGISTER
          LOCKMR CLEAR
          IF     DEF,HCM$
          LDML   HBUF+CPRPC
          RJM    SAC         START ALL CPUS
          ENDIF
          LJM    EMPX        RETURN
 DMP      SPACE  4,10
**        DMP - DISABLE MEMORY PORT.
*
*         ENTRY  (HBUF) = PROCESSOR INFORMATION.


          ROUTINE DMP
          IF     DEF,HCM$
          RJM    HAC         HALT ALL CPUS
          ENDIF
          LOCKMR SET
          READMR RDATA,CMCC,ECMR  READ MEMORY ENVIRONMENT CONTROL
          LDC    SHNI+4+3    GENERATE SHIFT INSTRUCTION
          SBM    HBUF+CPRPORT GET MEMORY PORT
          STM    DMPA        STORE SHIFT COUNT
          LDN    1
 DMPA     SHN    4+**
          STD    T3          SET MEMORY PORT DISABLE BIT
          LMC    0#FF
          LPML   RDATA,PO
          LMD    T3          SET MEMORY PORT DISABLE BITS FOR EACH CPU
          STM    RDATA,PO

          WRITMR RDATA,CMCC  REWRITE *EC* REGISTER
          FUNCMR HBUF+CPRPC,MRMC   MASTER CLEAR PROCESSOR
          LOCKMR CLEAR
          IF     DEF,HCM$
          LDML   HBUF+CPRPC
          RJM    SAC         START ALL CPUS
          ENDIF
          LJM    DMPX        RETURN

 DIP      SPACE  4,10
**        DIP - DISABLE MEMORY PORT FOR PROCESSOR WITH FATAL ERROR.
*
*         ENTRY  (HBUF) = PROCESSOR INFORMATION.
*
*         NOTE   THIS IS ESSENTIALLY THE SAME AS *DMP* EXCEPT THE
*                PROCESSOR IS NOT MASTER CLEARED.


          ROUTINE DIP
          IF     DEF,HCM$
          RJM    HAC         HALT ALL CPUS
          ENDIF
          LOCKMR SET
          READMR RDATA,CMCC,ECMR  READ MEMORY ENVIRONMENT CONTROL


          LDC    SHNI+4+3    GENERATE SHIFT INSTRUCTION
          SBM    HBUF+CPRPORT GET MEMORY PORT
          STM    DIPA        STORE SHIFT COUNT
          LDN    1
 DIPA     SHN    4+**
          STD    T3          SET MEMORY PORT DISABLE BIT
          LMC    0#FF
          LPML   RDATA,PO
          LMD    T3          SET MEMORY PORT DISABLE BITS FOR EACH CPU
          STM    RDATA,PO
          WRITMR RDATA,CMCC  REWRITE *EC* REGISTER
          LOCKMR CLEAR
          IF     DEF,HCM$
          LDML   HBUF+CPRPC
          RJM    SAC
          ENDIF
          LJM    DIPX        RETURN
 ENP      SPACE  4,10
**        ENP - ENABLE MEMORY PORT.
*
*         ENTRY  (HBUF) = PROCESSOR INFORMATION.
*
*         NOTE   THIS IS ESSENTIALLY THE SAME AS *EMP* EXCEPT THE
*                PROCESSOR IS NOT MASTER CLEARED.


          ROUTINE ENP        ENTRY/EXIT
          IF     DEF,HCM$
          RJM    HAC         HALT ALL CPUS
          ENDIF
          LOCKMR SET
          READMR RDATA,CMCC,ECMR  READ MEMORY ENVIRONMENT CONTROL

 ENP2     LDC    SHNI+4+3    GENERATE SHIFT INSTRUCTION
          SBM    HBUF+CPRPORT GET MEMORY PORT
          STM    ENPA        FORM SHIFT COUNT TO PORT DISABLE BIT
          LDN    1
 ENPA     SHN    4+**
          LMC    0#FF
          LPML   RDATA,PO    CLEAR PORT DISABLE BIT FOR THIS PROCESSOR
          STM    RDATA,PO

          WRITMR RDATA,CMCC  REWRITE *EC* REGISTER
          LOCKMR CLEAR
          IF     DEF,HCM$
          LDML   HBUF+CPRPC
          RJM    SAC         START ALL CPUS
          ENDIF
          LJM    ENPX        RETURN

*         END    CTP$DFT_MANAGE_MEMORY_PORT
