          SPACE  5,10
************************************************************************
*         SUBROUTINE NAME-   DCRCMA
*
*         PURPOSE-           DECREMENT A 28-BIT CM ADDRS
*
*         ENTRY-             A-REG CONTAINS THE ADDRS OF THE 1ST OF 3
*                             CONSECUTIVE WRDS WHICH CONTAIN A 28-BIT
*                             CM ADDRS; THE FORMAT OF THESE 3 WRDS IS AS
*                             FOLLOWS-
*
*                             1ST WRD- XXXXXXXXUUUU
*                             2ND WRD- MMMMMMMMMMMM
*                             3RD WRD- LLLLLLLLLLLL
*
*                             WHERE- X..X ARE IRRELEVANT TO THIS ROUTINE
*                                    U..U ARE CM ADDRS BITS 27-24
*                                    M..M ARE CM ADDRS BITS 23-12
*                                    L..L ARE CM ADDRS BITS 11-00
*
*                            DCT8 CONTAINS THE VALUE BY WHICH THE
*                             CM ADDRS IS TO BE DECREMENTED
*
*         EXIT-              THE 28-BIT CM ADDRS CONTAINED WITHIN THE
*                             3 SPECD PP WRDS HAS BEEN DECREMENTED
*
*         NOTES-             (1) THE DECREMENTING IS PERFORMED IN
*                             2'S COMPLEMENT; EG. 0000-1=7777 (NOT 7776)
*
*         USES-              DCT7,DCT8
************************************************************************
          SPACE  3
 DCRCMA   SUBR               ENTRY
          SPACE  1
*         MOVE 1ST, 2ND, AND 3RD WRDS TO LOCATIONS
*         DCR.TU, DCR.TM, AND DCR.TL, RESPECTIVELY
          SPACE  1
          STD    DCT7        SAVE ADDRS OF 1ST OF 3 WRDS
          LDM    0,DCT7
          LPN    17B         ONLY BITS 03-00 ARE RELEVANT
          STM    DCR.TU
          LDM    1,DCT7
          STM    DCR.TM
          LDM    2,DCT7
          STM    DCR.TL
          SPACE  1
*         PERFORM THE DECREMENTING OF THE 28-BIT
*         ADDRS WHICH NOW IS IN DCR.TU, DCR.TM, DCR.TL
          SPACE  1
          LDM    DCR.TL
          SBD    DCT8        SUBT SPECD VALUE FROM LOWER 12 BITS
          STM    DCR.TL       AND STORE RESULT
          SHN    -17         SHIFT SIGN OF RESULT TO BIT 0
          STM    DCR.SGN      AND SAVE IT (0/1 = POS/NEG)
          RAM    DCR.TL      ADD 0/1 TO RESULT
          LDM    DCR.SGN     0 OR 1
          LMC    -0          -0 OR -1
          RAM    DCR.TM      SUBR 0 OR 1 FROM MIDDLE 12 BITS
          SHN    -17         SHIFT SIGN OF RESULT TO BIT 0
          STM    DCR.SGN      AND SAVE IT (0/1 = POS/NEG)
          RAM    DCR.TM      ADD 0/1 TO RESULT
          LDM    DCR.SGN     0 OR 1
          LMC    -0          -0 OR -1
          RAM    DCR.TU      SUBT 0 OR 1 FROM UPPER BITS
          SHN    -17         SHIFT SIGN OF RESULT TO BIT 0
          RAM    DCR.TU      ADD 0/1 TO RESULT
          LPN    17B         ONLY 4 LOWER BITS ARE RELEVANT
          STM    DCR.TU
          SPACE  1
*         RETURN DECREMENTED CM ADDRS
*         TO THE ORIGINAL LOCATIONS
          SPACE  1
          LDM    0,DCT7      PICK ORIGINAL CONTENTS OF 1ST ADDRS SOURCE
          LPC    7760B        WRD AND RETAIN BITS 11-04
          ADM    DCR.TU      ADD CM ADDRS BITS 27-24
          STM    0,DCT7
          LDM    DCR.TM      CM ADDRS BITS 23-12
          STM    1,DCT7
          LDM    DCR.TL      CM ADDRS BITS 11-00
          STM    2,DCT7
          ENDSUB DCRCMA      EXIT
 DCR.TU   BSS    1
 DCR.TM   BSS    1
 DCR.TL   BSS    1
 DCR.SGN  BSS    1
