{This deck contains constant declarations for referencing processor
{defined registers.

  CONST
{                                     no write access }
    osc$pr_element_id = 10(16),
    osc$pr_maintenance_id = 11(16),
    osc$pr_options_installed = 12(16),
    osc$pr_virtual_machine_capab = 13(16),
    osc$pr_p_reg = 40(16),
    osc$pr_monitor_process_state = 41(16),
    osc$pr_monitor_condition_reg = 42(16),
    osc$pr_user_condition_reg = 43(16),
    osc$pr_untranslatable_pointer = 44(16),
    osc$pr_segment_table_length = 45(16),
    osc$pr_segment_table_address = 46(16),
    osc$pr_base_constant = 47(16),
    osc$pr_page_table_address = 48(16),
    osc$pr_page_table_length = 49(16),
    osc$pr_page_size_mask = 4a(16),

    osc$pr_model_dependent_flags = 50(16),
    osc$pr_model_dependent_word = 51(16),

{                                     monitor write access }
    osc$pr_monitor_mask_reg = 60(16),
    osc$pr_job_process_state = 61(16),
    osc$pr_system_interval_timer = 62(16),
    osc$pr_corrected_error_log = 92(16),

{                                     global write access }
    osc$pr_processor_test_mode = 0a0(16),

{                                     local write access }
    osc$pr_trap_disable = 0c0(16),
    osc$pr_trap_enable_delay = 0c3(16),
    osc$pr_trap_enable = 0c2(16),
    osc$pr_trap_pointer = 0c4(16),
    osc$pr_debug_list_pointer = 0c5(16),
    osc$pr_keypoint_mask = 0c6(16),
    osc$pr_keypoint_code = 0c7(16),
    osc$pr_keypoint_class_number = 0c8(16),
    osc$pr_process_interval_timer = 0c9(16),

{                                     unprivleged write access }
    osc$pr_set_critical_frame = 0e1(16),
    osc$pr_clear_critical_frame = 0e0(16),
    osc$pr_set_on_condition = 0e3(16),
    osc$pr_clear_on_condition = 0e2(16),
    osc$pr_debug_index = 0e4(16),
    osc$pr_debug_mask_reg = 0e5(16),
    osc$pr_user_mask_reg = 0e6(16);
