
.DF
  From: Rob Horning                          Date: 7/18/85

    To: Jim Couts 41                      Subject: 25 ns SRAM's
        Mark Forsyth
        Gerry Gassman
        Ron Guffin 44UF
        Ed Holland 44UF
        Bill Jaffe
        Marlin Jones 44UF
        Richard Lawrence
        Rick Luebs
        Dave Means
        Sang Park 41
        Tarang Patil
        Craig Robinson
        Russ Sparks                       cc: Denny Georg
        Darius Tanksalvala                    Peter Rosenbladt
        John Wheeler                          Dana Seccombe
.DE

Attached are the updated specs for the 25 ns SRAM's.  There have been a few
changes and I have added a spec for the 2K x 8 part.  I expect the specs
to be sent to the vendors next week.

We have about the same requirements for the 4K x 4, the 2K x 8, and the 16K x 4
parts.  The Cypress 4K x 4 spec will be used for these three parts with 
the exception of the power on the 2K x 8 and the chip enable access time on the 16K x 4.
This will allow us to use the Toshiba NMOS 2k x 8 part and give the vendors more
flexibility on the 16K x 4 part.
The Cypress 16K x 1 spec will be used for the 16K x 1 part.
In addition the following specifications will be added to all the parts.

.AL
.LI
Chip Enable high data hold time - 3 ns
.LI
Write Recovery time - 0 ns
.LI
Outputs will provide undershoot clamping.  At -2 Volts they will
provide 5 mA of clamping for 10 nS.  This is a characteristic that most memory
designs take advantage of but has not been specified in the past.
This parameter does not have to be 100% tested.
.LI
The AC timing characteristics are specified (does not have to be 100%
tested) for input signal transition times of less than 4 ns between .8
and 2.4 volts measured from the 1.5 volt level.
.LE

.DF
Pinouts  (Packages are all .3 inches wide)

16K x 4
















16K x 1










4K x 4










2K x 8
.DE
