From craig Fri Nov  1 17:45:09 1985
To: leith meh rob russ tom
Subject: System Characterization
Status: R





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     What was originally  coined the "FIREFOX Noise  Measurement"  effort has
     been expanded to cover FIREFOX system characterization,  including	cache
     bus, TLB and cache	RAM arrays,  math bus,	MIDBUS,	and MC-F / DRAM	array
     characterization.	Emphasis has been placed on  developing	 the detailed
     strategy  for  characterization  of the cache  bus,  with the  remaining
     characterization  areas to	be detailed  later.  Items needed in order to
     perform  this cache bus  evaluation  (fast	 parts,	test  vectors for pad
     drivers  and   enabling   receivers,   etc)  have	been   listed,	 with
     responsibilities identified.

     The first	step  involves	slow  parts in Rev C PGAs:  a second  FIREFOX
     system has	been  built,  including	a second  PRISM	 System	 tester.  The
     processor board has been built and	turned on.  A CPU and an SIU-F in Rev
     C	PGAs  are  in  hand,   and  have  been	checked	 out via  AVPs in the
     first FIREFOX  system.  These were	 then	soldered   into	 the   second
     FIREFOX processor	board (no ZIFs !).  This board will have no cache bus
     monitor or	CCU ECL	kluge, so as  to  provide  an	accurate   electrical
     environment  for  measurements.  Measurements  will  be  taken  with the
     sampling scope directly off this board.

     Jeff Yetter's group will develop two tools:  the first will repetitively
     drive  an	 arbitrary  stationary	walking	1's and	0's pattern, to	allow
     measurement of waveforms with the sampling	scope. The second will	drive
     once  a  walking  1's  or	0's  pattern with all receivers	 enabled, and
     compare the received values with expected values. These  tests  will  be
     performed with fast chips,	while varying supply voltages.























     FIREFOX System Characterization		 November 1, 1985





