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Project Manager - Tom Meyer:FIREFOX:date November 86
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Engineer - Rob Horning ::Project 7910
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OBJECTIVES:MD :%:RESULTS, STATUS
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Continue to do what ever it takes to insure that we get 25 ns 2K x 8 SRAM's
for Firefox.
T}:2:100:T{
I continued to put a fair amount of time keeping in touch with the SRAM
vendors.  We have seen real parts from Hitachi and we expect to see parts from
Toshiba and Cypress soon.
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Address any math board issues that come up.  Make the changes to the material
list to fix CA timing problem.
T}:3:100:T{
I put a lot of time into evaluating CA chip timing.  The chip has still not
tape released.
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Work on the math board documentation.  Finish the theory of operation.
T}:3:100:T{
I finished the theory of operation and updated the ers.  These are the bulk
of the work that needs to be done.
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Continue to help were needed on any memory board problems.
T}:1:100:T{
A couple of small problems came up.  I have been making sure that MID_BUS
timing problems found on the CA chip are not a problem on MC-F.
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Investigate ultra-fox.  Help develop some product data sheets.  Start looking
at alternatives for the cache, memory, and busses.
T}:5:80:T{
We have not done PDSes' yet but I have been meeting with the memory and cache
VLSI designers to discuss our needs and what they are thinking about.
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Start to prepare for the January memory conference if I have time.
T}:2: - :T{
There was not time.
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Work with other cache designers and the SRAM vendors to establish what SRAM's
we should use for ultra-fox.
T}:2:100:T{
I wrote a summary of the Fort Collins SRAM needs and set up video conference
with the IHO people in Cupertino.
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DEVIATIONS, ACTION
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KEY DECISIONS
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CONCERNS, CRITICAL ELEMENTS
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SUMMARY
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