
.H 1 "INTRODUCTION"

Afterburner is a custom bipolar IC that  will be used to receive addresses from the PCX
CMOS26 Spectrum CPU and drive these addresses to an array of high speed
cache SRAM's.  Afterburner is also called 1DV4.

.H 2 "PCX Chip Set"

The PCX chip set is a high performance chip set being developed in the CMOS26
process.  There are four unique CMOS26 chips being designed to implement the CPU
subsystem.

The key processor chip set specifications are listed below:

.DL
.LI
Maximum Frequency: 50 MHz (25 MHz at the Afterburner input)
.LI
Data Cache Size:   256 kbytes - 2 Mbytes
.LI
Instruction Cache size: 128 kbytes - 2 Mbytes
.LI
Number of Cache Rams:   15 - 54 RAMS /  Afterburner input
.LI
Number of Afterburner's per processor: 8
.LI
Performance:  16 - 24 MIPS
.LI
Product Introduction:   Q3 FY90
.LE


.H 2 "Contributions"
The PCX chip set cannot meet the 50 MHz design goal without Afterburner.  The
chip set is being optimized with the assumption that Afterburner is available.
How Afterburner affects performance and packaging is discussed below.

.H 3 "Performance"
Systems using Afterburner on
cache address lines achieve maximum cache access round
trip delays comparable to those which can be obtained
only by doubling the number of on-chip address drivers
in direct-drive systems. Pad limited designs utilizing
large cache RAM arrays can obtain improvements in delay
of several nanoseconds.

The total spread between the minimum and maximum possible
address drive delay is an important parameter in the
design of high performance clocking systems for PCX
processors. The use of Afterburner reduces this spread
by approximately a factor of two, allowing higher
performance clocking techniques to be used.

In implementations that are limited by data latch clock
skew rather than cache access delay, use of Afterburner
allows the option of increasing performance by moving the
data valid window using delay lines between the VLSI
processor and the buffers.

The VDL input allows the capability to limit output
voltage swing to a predefined level. This can be used to
optimize power/speed/noise margin tradeoffs.

.H 3 "Packaging"
The 44 pin ceramic J-lead package offers
significant advantages over packages commonly used
with commercially available buffer IC's. The large pin
count allows the use of relatively large numbers of VCC
and ground pins to minimize simultaneous switching noise.
The package utilizes a heat spreader and heat-sink
to allow the required power dissipation.

Several watts of power dissipation are eliminated from the
PCX CPU package and distributed among the buffer packages.

Simultaneous switching noise on the PCX CPU chip is
reduced significantly, simplifying VLSI package design and
improving performance.

Use of Afterburner allows greater flexibility
in processor PC board parts placement because distance
between the processor address drivers and cache SRAM arrays
becomes much less critical.

A reduction of 25 pads is achieved on the PCX CPU chip.


.H 1 "Afterburner General Description"

Afterburner will receive 6 TTL level inputs, and output
12 complement signals, 2 outputs paired with 1 input.  Essentially,
the function of the part is to buffer the input signals and
redrive them on the outputs as fast as possible. The VDL input
is used to receive a reference voltage which is used to limit
output voltage swing.

Afterburner has the following general features:

.VL 18 2
.LI Technology:
HP5 silicon bipolar IC, full custom digital design.

.LI Power~Supplies:
+5V,  +/- 0.25V

+3.3V, +/- 0.2V

.LI Power~Consumption:
2.0 W

.LI Chip~Size:
approx. 3 mm X 3 mm

.LI Maximum~Junction~Temp:
110 deg. C

.LI Package:
44-pin Ceramic J-lead package with heat slug and heat-sink.  Thermal resistance
from junction to air is 15.3 C/W at 15000 feet and 1 m/sec airflow.  The
package can be placed by the standard Hewlett Packard double sided surface
mount placement equipment.
.LE




.H 2 "Functional Description"

Afterburner has one function, that being to receive TTL level
input and redrive the data to an array of cache SRAM's.  Initially,
true/complement buffers were chosen as a way to speed up the drivers through
pin current balancing of a buffer pair's two output stages (one driver pulling
from VCC, and
the other to GND.)  However, the non-inverting buffer delay is much longer than
the inverting.  Therefore, inverting drivers will be used exclusively.
  Minimum drive time is important as well as maximum drive time.  If addresses
are driven too early, the RAM data will not be valid long enough at the
inputs of the receiving chips and data will be lost.  For this reason there is
a spec for minimum drive time as well as maximum drive time.
  Due to the fast edge rates that Afterburner will be driving on the
cache address bus,  all cache address lines will be terminated with high
frequency diodes to both VDL and GND.  This will help limit the negative and
positive overshoot on the cache address lines.  Limiting the overshoot will
limit the undershoot, which is usually a bigger problem than the overshoot.


.H 2 "Input/Output Description"

.DL
.LI
Signal Inputs:
.VL 9 2

.LI IN[0:5]
Inputs zero through five.  Signal driven from PCX CPU chip.
.LE

.LI
Signal Outputs:
.VL 9 2

.LI OUTA[0:5]
First inverted output signal.  These signals will be the inverted logical
level as IN[0:5].

.LI OUTB[0:5]
Second inverted output signal.  These signals will be the inverted logical
level as IN[0:5].
.LE

.LI
Power Supplies:
.VL 9 2

.LI VCC[0:5]
5.0V +/- 5%: VCC supplies.  The output current will come from these pins.

.LI VCC2[0:2]
5.0V +/- 5%: VCC supplies for the receiver and pre-driver stages of the buffer.

.LI VDL
3.3V +/- 0.2V: Low voltage power supply.  Used as a reference voltage.

.LI GND[0:15]
All GND pins connect to the package ground plane.
.LE
.LE

The pinout for Afterburner is shown below:

.DS
.TS
center tab (/);
rcccccccccccl.

      / / / / / / / / / / / / 
      / /O/ /O/ /V/ /O/ /O/ / 
      /G/U/V/U/G/C/G/U/V/U/G/ 
      /N/T/C/T/N/C/N/T/C/T/N/ 
      /D/B/C/A/D/2/D/B/C/A/D/ 
      /4/2/2/2/5/2/6/3/3/3/7/ 
      /|/|/|/|/|/|/|/|/|/|/|/ 
GND3 - / / / / / /*/ / / / / / - GND8

OUTA1 - / / / / / / / / / / / / - OUTB4

VCC1 - / / / / / / / / / / / / - VCC4

OUTB1 - / / / / / / / / / / / / - OUTA4

GND2 - / / / / / / / / / / / / - GND9

VCC20 - / / / / / / / / / / / / - VCC21

GND1 - / / / / / / / / / / / / - GND10

OUTA0 - / / / / / / / / / / / / - OUTB5

VCC0 - / / / / / / / / / / / / - VCC5

OUTB0 - / / / / / / / / / / / / - OUTA5

GND0 - / / / / / / / / / / / / - GND11
      /|/|/|/|/|/|/|/|/|/|/|/ 
      /I/G/I/G/I/V/I/G/I/G/I/ 
      /N/N/N/N/N/D/N/N/N/N/N/ 
      /0/D/1/D/2/L/3/D/4/D/5/ 
      / /1/ /1/ / / /1/ /1/ / 
      / /5/ /4/ / / /3/ /2/ / 
.TE

* pin one

This is a top view of the package.
.DE


.H 2 "Bypass Requirements"

Afterburner requires very low inductance connections to ground and to the
bypass capacitors.  Each power supply pin has its' own bypass capacitor.
This bypass capacitor is assumed to be .1 uF and have 3.5 nH of inductance.
The inductance from ground pins to the ground plane is .3 nH.


.H 1 "Specifications"

This section lists the specifications for Afterburner.  All of these
specifications must be guaranteed, but they do not have to all be
100% tested.

.H 2 "Absolute Maximum Ratings"
Stresses beyond the absolute maximum ratings may cause permanent damage to
Afterburner.

.DS
.TS
center tab (/) box;
l|l.
Storage Temperature/-55 to 150 deg. C
_
Operating Junction Temp/-5 to 110 deg. C
_
Voltage at Supply pins/-.5 volts to +7 volts
_
Voltage at Input pins/-.5 volts to VDL +0.5 volts
_
Voltage Applied to Outputs/0.0 to VDL +1.0 volts
_
Power Dissipation/2.5 Watts
_
Output Current (Peak)/500 mA (note 1)
_
Output Current (DC)/200 mA (note 1)
_
Maximum Frequency/30 MHz (note 2)
.TE

Note 1: Short circuits on the outputs may cause permanent damage.

Note 2: Afterburner will operate at 30 MHz, but may require better cooling
and delay may change.
.DE


.H 2 "Operating Conditions"

.DS
.TS
center tab (/) box;
l|l.
Air Flow/1 meter per sec.
_
Operating Temperature/-5 to 70 deg. C
_
Junction Temperature/0 to 110 deg. C
_
VCC and VCC2 Voltage/4.75 to 5.25 Volts
_
VDL Voltage/3.1 to 3.5 Volts
_
Input Low Level/-.5 to .8 Volts (Note 1)
_
Input High level/2.2 to VDL + 0.5 Volts
_
Maximum Input Rise Time/ 25 nS
.TE

Note 1: The input may be pulsed with -3.5 Volts through a 30 Ohm resistor
for 10 ns.
.DE


.H 2 "DC Characteristics"


.DS
.TS
center tab (/) box;
l|l.
Max. Input Low Current/8 mA
_
Max. Input High Current/1 mA
_
Max. Input Capacitance/10 pF (note 1)
_
Output High Level/VDL + or - 0.5 Volts (note 2,3)
_
Output Low Level/0.0 to 0.4 Volts (note 4)
.TE

Note 1: The maximum capacitance is the average capacitance for switching
from a high to a low input level.  The capacitance is not linear and is
much lower for a low to high transition.

Note 2: When the output is clamped to VDL, Afterburner shall not source current.
The high level is specified for a DC load of 1 mA.  At 20 mA DC load the output
may go as low as VDL - 1 Volt.

Note 3: When 6 outputs (loaded with a 400 pS 25 Ohm line terminated with
180 pF each)change from low to high and one output (loaded with a 400 pS
25 Ohm line terminated with 15 pF) starts high and remains high, the output
will not bounce below VDL- .6 volts when measured at the end of the 400 pS line.

Note 4: When 6 outputs (loaded with a 400 pS 25 Ohm line terminated with
180 pF each)change from high to low and one output (loaded with a 400 pS
25 Ohm line terminated with 15 pF) starts low and remains low, the output
will not bounce above .55 volts when measured at the end of the 400 pS line.
.DE

.H 2 "Power Supply Currents"

Maximum power is specified with VCC = 5.25 Volts, VDL = 3.5 Volts,
TJ = 110 degrees C, switching at 25 MHz, and all outputs loaded with
180 pF each.

Nominal power is estimated with VCC =5.0 Volts, VDL = 3.3 Volts, nominal
process and resistors, TJ = 25 degrees C, switching at 25 MHz, and all
outputs loaded with 100 pF each.

.DS
.TS
center tab (/) box;
l|ll|ll|ll|l
l|ll|ll|ll|l
l|rr|rr|rr|r.
 /AVG/AVG/RMS/RMS/PEAK/PEAK/Units
 /NOM/MAX/NOM/MAX/NOM/MAX/ 
_
VCC/297/579/759/1220/2640/3640/mA
_
VCC2/115/167/126/181/300/413/mA
_
VDL/-14/-31/27/60/-107/-208/mA
_
GND/360/536/807/1070/2850/3710/mA
.TE

Note 1: The power dissipated on the chip will be 1380 mW nominal and 2000 mW
maximum at 25 MHz operation.

Note 2: The Maximum stand-by power (0 Hz) is 920 mW and 660 mW nominal.  The
power will increase linearly with frequency to 25 MHz.  The maximum stand-by
power is measured with all outputs low and no load.

Note 3: All currents and the power dissipation will increase by 20% at 30 MHz.

Note 4: The outputs will normally be terminated to VDL and GND with clamp diodes.
This will cause current to be sourced into VDL.  The magnitude of this current
is more a function of the load than the driver and so it is not specified here.
The VCC average maximum current does include 440 mA that is sourced into VDL.
.DE


.H 2 "AC Characteristics"

The AC specifications are guaranteed with a maximum load which consist of
a 400 pS, 25 Ohm transmission line terminated with a 180 pF capacitor and a
schottky diode.  The minimum load is a 400 pS 25 Ohm transmission line
terminated with a 30 pF capacitor and a schottky diode.  Signals are measured
at the capacitor when the signal crosses 1.5 volts.

Delay is measured from the time that the input crosses 1.5 Volts with the input
changing between .8 to 2.4 Volts in 1 nS at 25 MHz.

.DS
.TS
center tab (/) box;
l|c|c
l|l|l.
Junction Temp./0 C/110 C
Maximum Delay/4.2 nS/4.0 nS
_
Minimum Delay/1.0 ns/1.0 ns
.TE

Note 1: The maximum delay will changes in a linear fashion between 0 and 110
degrees C.
.DE

The minimum delay is assumed to be with VCC = 5.25 volts, VDL = 3.1 Volts,
TJ = 0 degrees C, minimum load, and one output pair switching.

The maximum delay is assumed to be with VCC = 4.75 Volts, VDL = 3.5 Volts,
TJ = 110 Degrees C, maximum load, and all outputs switching.


.H 2 "Reliability"

Afterburner will meet the specifications of the Hewlett Packard General
Semiconductor Specification.

Afterburner will be expected to meet all specification in a Hewlett
Packard Class B system environment.

Afterburner will have a failure rate of less than .01% per 1000 hours at 85
degrees C.  The failure rate will be less than .1% per 1000 hours at 110
degrees C.

Afterburner reliability will not be degraded by the standard Hewlett Packard
double sided surface mount process.


.H 1 "Testing"

This section will be updated after the characterization is done and the
production test is in place.

.H 2 "Characterization"

The AC characterization will consist of measuring the drive time and
power dissipation of the buffer over the process corners and minimum
and maximum load capacitances.

The test board must have a ground plane to assure good high frequency
characteristics.  The board will need room enough to apply 12 loads to
the chip, one for each driver.


.H 2 "Production Test"

All production tests may be DC only.  Production tests will include
testing input thresholds, output voltages at various currents, and
quiescent currents.  A DC parameter that correlates to an AC
characteristic will also be tested.  Afterburner will be tested as a
ring oscillator to insure AC specifications are met.

