
.H 1 "Preliminary Target Specification for a 64K x 4 15 nS SRAM"

This is a preliminary target specification for a 64K x 4 15 nS SRAM.
The package is assumed to be a 24 pin SOJ.

Some of the specifications are noted as being critical.  These are
specifications that have a large impact on our system performance.
They are almost as important as access time.

Some specifications are noted saying that they can be relaxed.  These
specifications do not have a large impact on our system performance.

The power supply specifications has been tightened to match our system
power supply.

The input capacitance is specified to be a maximum of 3.5 pF.  This is the
average across the address lines.  If some inputs are more than 3.5 pF
and some are less we need to know which ones are higher and which are lower.
Minimum capacitance is also
specified.  Capacitance should not be added to meet the minimum capacitance
specifications.  It is more important to keep the maximum capacitance for any
given input as low as possible than it is to meet the minimum capacitance
specification.

The output high level for very small loads has been increased to 2.9 volts.
It is assumed that this specification can be met without changing the
output driver.  If this is not true we would like to know what level can be
guaranteed without changing the driver.

The AC test load capacitance has been changed to 60 pF and a second test
circuit has been added.  This is a better model of what our system load
will really be.  Simulations and experiments show that load 2 is about
2 ns slower than the traditional test load (load 1 with 30 pF instead of
60 pF).  We do not have a pull up resistor on our load, but we have seen cases
where transmission line ringing causes the output to go over 4 volts and there
is no leakage path to bring it down.  The 10K resistor is used only to give the
high level that the transmission line ringing may cause.

A column has been included for vendor proposed specifications.  This column
should be filled in if your proposed specification is different than ours.
An explanation should be attached for specifications that are changed.
We have made the target specifications that are important to our system
performance aggressive.  We expect that some of the specifications will have
to be relaxed.  We made them aggressive to emphasize what specifications are
important to us.


.DS
DC OPERATING CONDITIONS
.TS
tab (/) allbox;
lcccccc.
Symbol/Parameter/Min/Max/Units/Notes/Vendor
 / / / / / /Spec
_
VCC/Supply Voltage/4.75/5.25/V
TEMP/Ambient Temperature/0/70/C
VIH/Input High Level/2.0/6/V
VIL/Input Low Level/-0.5/0.8/V/1
.TE

Note 1: VIL = -3.0 Volts for pulse widths less than 10 nS.
.DE


.DS
DC ELECTRICAL CHARACTERISTICS
.TS
tab (/) box;
l|c|c|c|c|c|c|c.
Symbol/Parameter/Conditions/Min/Max/Units/Notes/Vendor
 / / / / / / /Spec
=
ILI/Input Leakage Current/VCC=Max./-/10/uA
_
ILO/Output Leakage Current/VCC=Max./-/10/uA/2
_
VOL/Output Low Voltage/IOL = 8 mA/-/0.4/V
_
//IOH = -100 uA/2.9/ /V/ 
VOH/Output High Voltage/_/_/_/_/_/_
//IOH = -4 mA/2.4/ /V
.TE

Note 1: This is a critical specification.

Note 2: This specification can be relaxed if needed.
.DE


.DS
POWER
.TS
tab (/) allbox;
l|c|c|c|c|c|c|c.
Symbol/Parameter/Conditions/Min/Max/Units/Notes/Vendor
 / / / / / / /Spec
-
ICC1/Supply Power/f=Max./-/100/mA/1
ICC2/Supply Power/f=0/-/90/mA/1
.TE
Note 1: Maximum power is measured with the chip enabled, VCC=5.25, and the
outputs open.
.DE


.DS
AC ELECTRICAL CHARACTERISTICS
.TS
tab (/) allbox;
lcccccc
lsccccc
lcccccc.
Symbol/Parameter/Min/Max/Units/Notes/Vendor
Read Cycle/ / / / /Spec
_
tRC/Read Cycle Time/15/-/ns
tAA/Address Access Time/-/15/ns
tACS/Chip Select Access Time/-/15/ns
tCLZ/Chip Select to Output in Low Z/5/-/ns
tOE/Output Enable to Output Valid/-/15/ns/2
tOLZ/Output Enable to Output in Low Z/5/-/ns
tCHZ/Chip Select to Output in High Z/-/7/ns
tOHZ/Output Disable to Output High Z/-/7/ns/2
tOH/Output Hold After Add. Change/5/-/ns/1
.TE

Note 1: This is a critical specification.

Note 2: This specification can be relaxed if needed.
.DE


.DS
AC ELECTRICAL CHARACTERISTICS
.TS
tab (/) allbox;
lcccccc
lsccccc
lcccccc.
Symbol/Parameter/Min/Max/Units/Notes/Vendor
Write Cycle/ / / / /Spec
_
tWC/Write Cycle Time/15/-/ns/2
tCW/Chip Select to End of Write/15/-/ns/2
tAW/Address Valid to End of Write/15/-/ns/2
tAS/Address Set-up Time/0/-/ns/2
tWP/Write Pulse Width/12/-/ns/1
tWR/Write Recovery Time/0/-/ns/1
tWHZ/Write Enable to Output in High Z/-/6/ns
tDW/Data Valid to End of Write/8/-/ns
tDH/Data Hold Time/0/-/ns
tOW/Output Active from End of Write/5/-/ns
.TE

Note 1: This is a critical specification.

Note 2: This specification can be relaxed if needed.
.DE


.DS
CAPACITANCE
.TS
tab (/) allbox;
lcccccc.
Symbol/Parameter/Min/Max/Units/Notes/Vendor
 / / / / / /Spec
_
Cin/Input Capacitance/1/3.5/pF/1,3
Cout/Output Capacitance/0/5/pF/2
.TE

Note 1: This is a critical specification.

Note 2: This specification can be relaxed if needed.

Note 3: This is the average capacitance for all input only pins.
.DE


Input Signals:

AC electrical specifications are guaranteed with input signals that change
between .8 and 2.4 volts with a rise/fall time of less than or equal to 4 ns.
Both input and outputs are measured from 1.5 volts.


Output Loads:

Specifications are guaranteed with the three output loads shown on the following
page.

Load 3 is used for tOH, tHZ, tLZ, tWZ, and tOW.

All other AC specifications are guaranteed with both load 1 and load 2.

