


				  - 1 -



       1.  TTTTAAAABBBB



       This is a summary of what will be needed	by IHO in TAB
       technology in the next 2	or 3 years.  At	this point many
       assumptions and guesses are being made on what will be
       required	because	we are just starting to	design products
       that will use TAB technology.

       There are currently two programs	planning to use	TAB.  The
       first will be referred to as phase 1.  This program will
       need proto-types	in the first half of 1987 and needs to be
       in production in	the first half of 1988.	 The phase 2
       program will need proto-types in	the second half	of 1987	and
       will need to be in production by	1990.


       1.1  LLLLeeeeaaaadddd PPPPiiiittttcccchhhh



       The table below shows the requirements for phase	1 and phase
       2 for TAB lead pitch, pin count,	and chip size.


		    TTTTAAAABBBBLLLLEEEE 1111....  TAB Pinout Requirements
	      _____________________________________________
	     | Parameter	      |	 Phase 1|  Phase 2|
	     |_________________________|__________|__________|
	     | Lead count	      |	   272	|   520	  |
	     | Signal count	      |	   210	|   360	  |
	     | Inner lead pitch	(mils)|	     4	|     4	  |
	     | Outer lead pitch	(mils)|	    16	|     8	  |
	     | Chip size (cm square)  |	     1	|     1.4 |
	     |_________________________|__________|__________|



       1.2  NNNNooooiiiisssseeee aaaannnndddd CCCCrrrroooossssssssttttaaaallllkkkk	CCCCoooonnnnttttrrrroooollll



       It is important to have good electrical models of the TAB.
       The tape	needs to be double metal to allow for a	ground
       shield.	This will make the the model more predictable,
       reduce cross coupling, and make the TAB more closely match
       the PC board characteristic impedance.  The table below
       shows a first pass set of specs for a shielded TAB.













				  - 2 -



		      TTTTAAAABBBBLLLLEEEE 2222....	TAB Electrical Specs
	     ________________________________________________
	    | Inner bond inductance|		 .4 to .5 uH|
	    | Outer bond inductance|		 .5 to .6 uH|
	    | TAB char.	impedance  |  50 Ohms +	or - 10%    |
	    | System cross coupling|	   Less	than 10%    |
	    |_______________________|_________________________|

       1.3  AAAAttttttttaaaacccchhhh aaaannnndddd RRRReeeemmmmoooovvvvaaaallll


       There are several things	that need to be	specified to insure
       that this process can be	made to	work.  The table below list
       some specs that pertain to the attach and removal process.


		  TTTTAAAABBBBLLLLEEEE	3333....  TAB	Attach and Removal Specs
	   ____________________________________________________
	  | Outer lead bonder failure rate|   200 ppm per part|
	  | Repair success rate		  |	    99%	      |
	  | Number of repairs per TAB	  |	     3	      |
	  |________________________________|____________________|



       Another thing that needs	to be specified	is the solder on
       the PC board pad.  The table below shows	the requirements.


		      TTTTAAAABBBBLLLLEEEE 4444....	Solder Requirements
       ____________________________________________________________
      |	Parameter		  |    Phase 1	 |     Phase 2	  |
      |____________________________|_______________|_________________|
      |	Solder thickness (microns)|  20	+ or - 5 |   10	+ or - 2.5|
      |	Solder Mask		  |	SMOBC	 |	SMOBC	  |
      |	Solder composition	  |	  ?	 |	  ?	  |
      |____________________________|_______________|_________________|





       1.4  TTTTeeeesssstttt



       There should be no significant test differences between TAB
       and PGA parts.














				  - 3 -



       1.5  TTTToooooooolllliiiinnnngggg aaaannnndddd	MMMMaaaannnnuuuuffffaaaaccccttttuuuurrrriiiinnnngggg



       The table below list the	manufacturing and tooling cost for
       TAB's:


		 TTTTAAAABBBBLLLLEEEE 5555....  Manufacturing and Tooling Cost
	      _____________________________________________
	     | Total packaging cost	|   Less than $20 |
	     | Tape tooling		|   Less than $50K|
	     | Outer lead bonder fixture|   Less than $10K|
	     |___________________________|__________________|


       The outer lead bonding must fit well into a high	volume
       manufacturing environment.  It is not clear what	needs to be
       specified at this time but some examples	are listed below.

	 1.  Through put -  This is the	number of TAB's	that can be
	     bonded per	hour.

	 2.  In	process	time  -	 This is the amount of time it
	     takes from	when a board leaves the	manufacturing step
	     before outer lead bonding (surface	mount) to when it
	     arrives at	the next step after outer lead bonding
	     (board test).

	 3.  Set up time  -  The amount	of time	it takes to set	up
	     a new board on the	outer lead bonder.

	 4.  Availability  -  A	combination reliability	and mean
	     time to repair.


       1.6  PPPPrrrroooottttoooo TTTTuuuurrrrnnnnaaaarrrroooouuuunnnndddd TTTTiiiimmmmeeee



       The table below list the	turnaround times for TAB'ed parts
       for phase 1 and Phase 2.



       1.7  FFFFoooooooottttpppprrrriiiinnnnttttssss



       The size	of the TAB is primarily	determined by the number of
       leads and the outer lead	pitch.	The 272	pin TAB	for phase 1











				  - 4 -



			 TTTTAAAABBBBLLLLEEEE 6666....  TAB Lead Times
		_________________________________________
	       | Item		   |  Phase 1 |	 Phase 2|
	       |____________________|___________|__________|
	       | Tape tooling	   |  12 weeks|	 8 weeks|
	       | Add gold bumps	   |  2	weeks |	 1 week	|
	       | Inner lead bonding|  1	weeks |	 3 days	|
	       | Outer lead bonding|  1	weeks |	 2 days	|
	       |____________________|___________|__________|

       is about	the same size as the 520 pin TAB for phase 2.  The
       lid is 1.6 inches square.  Components should not	be placed
       within .1 inches	of the lid on either side of the board.


       1.8  RRRReeeelllliiiiaaaabbbbiiiilllliiiittttyyyy



       TAB should be more reliable than	PGA's because the process
       is more consistent and the bond pull strength is	3 to 4
       times greater.  The goal	is to be twice as reliable as a
       PGA.


       The TAB parts must _m_e_e_t _o_r _e_x_c_e_e_d the quality and
       reliability standards detailed in HP drawing1 number A-
       5951-7600-1 under the GGGGeeeennnneeeerrrraaaallll SSSSeeeemmmmiiiiccccoooonnnndddduuuuccccttttoooorrrr SSSSppppeeeecccciiiiffffiiiiccccaaaattttiiiioooonnnn
       section.	 The goals which the parts must	meet include
       electrical and physical tests of	hermeticity, resistance	to
       solvents, solder	process	resistance, thermal shock, moisture
       resistance, temperature cycling,	humidity resistance, long
       term life, and terminal lead strength.  Copies of this
       specification are available from	the FFFFIIIIDDDD	Quality	Assurance
       Group.


       1.9  TTTThhhheeeerrrrmmmmaaaallll CCCChhhhaaaarrrraaaacccctttteeeerrrriiiissssttttiiiiccccssss



       Efficient heat removal is an important characteristic of	the
       TAB  package.   Up  to 12 watts of power	can be generated by
       the VLSI	chip, and therefore the	TAB system _m_u_s_t	be able	 to
       withstand   heat	  without  degradation	of  performance	 or


       __________

	1. This	document is also known as the FFFFIIIIDDDD QQQQuuuuaaaalllliiiittttyyyy NNNNooootttteeeebbbbooooooookkkk.












				  - 5 -



       reliability.  The chips themselves can be at  no	 more  than
       110 o  C.


       To ensure that the chip is properly cooled, the TAB  package
       must have a thermal resistance between the chip and heatsink
       of less than 1.2	o  C per Watt.	Heat  sink  design  will  be
       determined by HP, as will the interface requirements between
       the TAB coverplate and heatsink.


















































