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	  To: Jim Couts				      Date: 11/17/86

	From: Rob Horning			   Subject: SRAM Needs




       This is summary of what we talked about at the 11/11/86
       video conference.  I am also including the SRAM needs for
       each of the three projects being	done in	Fort Collins.  I am
       sending them all	together.  Let me know if you want the
       format changed.

       We have agreed that you will be the central point for
       communications and that I would be the main contact for Fort
       Collins and Tak would be	the main contact for Cupertino.

       Someone had asked Rick to send them information about what
       effects SRAM speed that he got from Motorola.  This is not
       specified and is	only typical.

	  Temperature: .2%/Degree C

	  Vdd: 20%/Volt

	  Capacitance: .11%/pF

       Motorola	tests the SRAM's at 80 degrees C, Vdd =	4 Volts,
       and with	load capacitance of 110	pF.

       Care must be taken not to give this data	directly to the
       SRAM vendors because it does contain new	product
       information.



























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       1.  FFFFiiiirrrreeeeffffooooxxxx NNNNeeeeeeeeddddssss


       Contact:	Rob Horning Fort Collins 2U telnet: 229-2501

       We are currently	using 2K x 8 25	ns SRAM's in Firefox.  Up
       to this point we	have been using	35 ns parts that were
       screened	to run at 28 ns	with some restrictions.	 We expect
       to start	qual on	full spec 25 ns	parts this month.  The
       vendors we are working with are Hitachi,	Toshiba, Cypress,
       and VTI.	 Not all of these vendors will be qualified.



















































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       2.   SSSSuuuuppppeeeerrrrffffooooxxxx NNNNeeeeeeeeddddssss


       Contact:	Tom Spencer Fort Collins 2U telnet: 229-2099

       Superfox	plans to use 16K x 4 20	ns surface mount SRAM's.
       We plan to use a	24 pin SOJ package because it looks like
       this will be a standard.	 We need 250 SOJ parts in 2/87.
       These can be 25 ns parts.  We need 20 ns	parts in 7/87.
       Production will be about	5/88.  We are working with Motorola
       and Mitsubishi to get this part.



















































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       3.  FFFFuuuuttttuuuurrrreeee PPPPaaaarrrrttttssss


       Contact:	Rob Horning Fort Collins 2U telnet: 229-2501
		Rick Luebs  Fort Collins 2U telnet: 229-3908

       We are currently	evaluating what	SRAM's will be needed for
       PC12 and	PC25.  We expect to have products about	1990.  At
       this point we can only guess at what will be available for
       SRAM's in that time frame.  Our strategy	is to design for
       the best	part that we think will	be available and to make
       sure that the CPU VLSI works well with a	less aggressive
       part and	that it	can take advantage of a	more aggressive
       part.

       We are assuming that we will be able to get 64k x 4 15 ns
       parts and 16K x 4 10 ns parts for a reasonable cost.  We	are
       assuming	that we	will be	able to	have some feature to help
       in speeding up copy-ins.	 How we	currently feel about the
       characteristics of the SRAM's is	discussed below.


       3.0.1  _S_p_e_e_d   Speed is is the most important characteristic
       for the SRAM.  This is especially true for PC25.	 It is the
       one thing that directly effects the performance.


       3.0.2  _D_e_n_s_i_t_y	We will	use the	deepest	x4 part	available
       at a reasonable cost for	PC12.  It need s to be at least	16K
       deep.  PC25 needs to be at least	64K deep.  We would prefer
       a 64K x 1 15 ns part to a slower	64K x 4	part for PC25.


       3.0.3  _W_i_d_t_h   For PC12 we would	prefer a wider part.  We
       may even	be willing to take a small speed penalty to get	a
       x8 part.	 At this time we are assuming that the speed
       penalty would be	fairly large and so we are assuming that we
       will have to use	a x4 part.  Width is not a big issue for
       PC25 and	we could even use a x1 part if they were faster
       than the	x4 parts.


       3.0.4  _C_o_s_t   Cost is important for PC12.  We need the cost
       to be below about $10.


       3.0.5  _C_o_m_p_a_t_i_b_i_l_i_t_y   We do not	want to	have features or
       specs that do not allow us to get parts from more than one
       vendor.	We will	try to influence the direction of the SRAM
       vendors but we will use parts that are common.  We are
       assuming	that there will	be standard surface mount packages











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       for the parts that we use.


       3.0.6  _F_e_a_t_u_r_e_s	 There are a number of features	that may be
       available on future SRAM's.  We would like to take advantage
       of some of these, but only if they become standard features.


       3.0.6.1	_W_r_i_t_e__T_i_m_i_n_g   We have talked to a number of
       vendors on improving the	write timing.  The feature that	we
       have talked about is being able to end a	write by changing
       the address.  We	would also like	this to	start another
       write.  We still	need to	do the regular writes also.  If	we
       can not get this	feature	we would like negative hold times
       on address at the end of	the write.


       3.0.6.2	_P_i_p_e_l_i_n_e_d__S_R_A_M_'_s   People have talked to us about
       putting pipeline	registers on the SRAM.	We are currently
       not planning to use these features.  If they looked like
       they were going to become standard we would consider using
       them.


       3.0.6.3	_P_a_c_k_a_g_i_n_g__S_p_e_c_s	  The timing and capacitance specs
       are the same for	surface	mount and DIP packages.	 We have
       talked to vendors about getting special specs for the
       surface mount packages.	As the speeds approach 10 or 15	ns
       the package becomes even	more important.	 The capacitance of
       the address and control signals have a major effect on how
       fast they can be	driver.	 We have talked	about getting
       better capacitance specs	on surface mount packages and also
       about having different specs for	different pins.	 This would
       allow to	mix the	address	lines some to get a lower maximum
       capacitance.
























