
12/20/85
Rob Horning

The CPU board is layed done and checked.  I should get the array terminating
resistors shortly after I get back.  Marcia is working on getting diodes.

The traces are now being put down on the math board.  There has still been
some changes to the heat sink, but it seems to be stable now.  The net
lister is now working and so I will be able to check the board with Tom's
program.  I tested the crystal circuit for the RTC and measured the power.
I finished the PAL equations and ran some test vectors to verify that they
were correct.  If I have time I will breadboard all the changes to the PDH
when I get back.

The memory architecture did not change.  It is a little different than the
rest of the architecture.

I have verified the package sizes for the SOIC parts on the 8 Mbyte RAM board.
I have received some Toshiba mechanical sample of the SOJ 1 MBIT RAM's.
The order has gone out for 75 parts (72 parts/board) to be received in March.

