
4/21/86
Rob Horning

I spent a day finding a problem on FF-3.  It turned out to be that the
TCU was not plugged in far enough.  It was not a total waste of time
because I learned a lot about debugging the system.

I took a quick look at some of the lines on the cache array and they
looked good.  I still need to take a closer look and compare the results
to the simulations.

Leith gave me a set of SRAM's that he said was having problems in the
TCU array on FF-1.  They passed the TCU tests in FF-3.  I still need to
talk to Leith about what was happening on FF-1.

I received a copy of the SRAM spec from MTC.  I reviewed it and there
are no big concerns.  There are some small things that I need them to
add.

It looks like we are going to need more SRAM's.   I am going to order
200 more parts.  I have also been looking into cost and lead time on
getting 1000 - 4000 1 Mbit DRAM's.  We also need more adapter boards for
Indigo memory and CA's.  I have ordered more PC boards.

I have decided to move the math connector contact holes .003 inches and
leave the mounting holes were they are.  This will put it on spec for
the standard board tester.  John Hoppal said this should not be a
problem.

I added a 5 Mbyte Indigo memory board to FF-4.  It seemed to work but they
did not get UNIX to work with it before they left.

We got 2 CA chips on Friday.  One worked and one did not.  We have run
Dave's DMA test and it passed.  We want to run a test that does some IO
and then try it on UNIX.

I found one more problem with the last 2 Mbyte memory board and fixed it.
I have five 2 Mbyte boards.

The MC-F chip should be released today.

