
12/01/86
Rob Horning

The CIO CA chip is expected to tape release tomorrow.  I just got a 14 page
spec that I am trying to understand.

I have my PAL equations in JEDEC format.  I am still working on getting them
on to an IBM disc.

We are thinking about building some Math boards with old CA chips.  I have
asked Marcia to order some voltage regulators that are in the right package.

I turned on the new math board.  There were no problems.  I used an old
CA chip and so I had a couple of cuts and jumpers because of the pinout
changes.  There are still a couple of things I want to check on it.

I have finished the math board theory of operation.  I think that everyone
is clear on how to program the calibration constants.  This is in the
theory of operation.

The EEPROM that is on the math board is going to be taken out of production
and so I am working on changing it.  It will be 4 times as big.  This should
not be a problem unless the programming mode changes, which would cause
a change to Steve's code.  I think that I can get one that has the same
programming mode.

I have continued to work on getting SRAM's.  The vendors are still saying
that they will have us parts in the next couple of weeks.  I have asked
Cypress about getting screened parts if they do not deliver the real parts.
They have not gotten back to me yet.  Toshiba is supposed to send MTC 375
parts this week.  I am going to try to get those. 

