
1/13/86
Rob Horning

The Math board layout is done.  I still need to red line it.  Bob Krebs is
going to update the schematic and place the parts with EGS so that the board
can be checked with Tom Spencers program.

The Cypress SRAM's where shipped 1/9.  We are not going to order more right now.

I looked at a couple of the Toshiba screened parts.  They had an access time of
between 21 and 22 ns.  We have ordered 800 real parts to be delivered 3/1.
If they come back and say that they cannot deliver the real parts in march we
may change part of the order to Cypress RAM's.

A CCU timing problem was found and I have been helping find a solution.  We
have decided to not change the design.  An addition to the SRAM spec can
solve the problem.  It is something that the SRAM's most likely do anyway.
I am in the process of asking the vendors about the change.  Cypress has
said that there is no problem with the change and that they would be surprised
if anyone else had a problem.

I wire wrapped the PDH but have not had a chance to check it yet.

I have designed the card extenders.  We will be able to bring any card out
of the machine.  When there is no card cage we will be able to put the CPU
its' side to allow the cache bus monitor to be hooked up without making
the bus lines a lot longer.  If we are willing to give up 3 MID_BUS slots
and 3 CIO slots we can hook up the cache bus monitor and have only the math
board extended a couple of inches.

