
5/5/86
Rob Horning

I prepared to go into PC layout with the Math board.  I am do not have
everything ready, but I have enough for them to get started.

I made some design changes to the battery isolation and write line protection
circuits on the RTC.  I also tested these changes.  They seem to work very
well.

I started to make the design changes to support a third EPROM.  We will still
only be able to support 2 ROM's.  It would require major changes to support
more than 2 ROM's.

I helped the chip designers put a delay in the CPU clock so that they could
skew the clock.  The clocks are all within about 3 nsec.  I told them to
get back to me if they needed better than this.

I helped get more Indigo CA and memory board extenders and backplane boards
built.

I spent some more time looking at the VLSI CA.  We got a math board put
together that can be used in RFI testing.  It uses the CA chip to talk to
a terminal.

I got the 8 Mbyte RAM PC boards from Photronics.  I will not load any until
after we get MC-F's.  I still do not have RAM's.

