
11/10/86
Rob Horning

I spent a lot of time working on the CA chip MID_BUS timing.  I prepared
for and had a design review of the timing changes.  Some concerns came
up.  I resolved most of these.  The one problem that still is not totally
resolved is how the clock lines should be driven.

I have been looking into what we will need and what will be available for
high speed SRAM's in the next few years.  I set up a video conference for
tomorrow to discuss our needs with the other IHO groups looking needing
high speed SRAM's.

I sent an outline to Tak Watanabe on what I plan to talk about at the memory
conference in January.

I spent some time with Tim Asmussen talking about what he needs to test
the 3065 test program.  I have a board that I made most of the changes to
that he should be able to use.

I updated my part of the Firefox ERS.

