
11/23/87
Rob Horning

I have been spending most of my time working on the ECL driver.  I am
seeing about .5 volts of noise on one of the lines.  It turns out that it is
due to cross talk at the wire bonds.  The model is very conservative.
Joel Lamb has agreed to do some things with the Pinout that should reduce
the cross talk.  I have given Dave Quint better data and asked him to give me
a better cross talk model.  I have also started to look at the timing for
the driver.  I am a little concerned with the speed, but need to make sure that
I am measuring it correctly.

I gave Tarang models to use for the RAM driver simulation.  There is still a
lot of work to do in this area, but it does not have to get done until next
month.

I looked at the new CPU pinout.  The DCD moved some, but I am not sure if
this will cause problems.  I am starting to think that we do not want the FPC
to mirror the CPU.  Mirroring could cause the DCD to be about .5 inches longer
than it would be if we did an optimal pinout.

I took 2 days FTO.

