
10/5/87
Rob Horning

I talked to materials engineering about our UPS needs.  I also wrote
Bob Myers a memo on what we would need and why.  I have asked him to
get me information on size, cost, and weight.

I have been working with Tom Spencer on different parts placements
for the PCX1 CPU board.  I was concerned with the placement of the
BIT chips (thermal problems) and also with the length of the data
cache tag lines.  I feel good about the placement that we came up
with.

I have started to figure out the routing for the DCD bus and the data
cache address lines and tag lines.  It still looks like the board can
be routed on 6 signal layers.  I am still concerned about the SRAM's
spedding out because of the number of feed-throughs needed for the
the data lines.

I have been working with Jon Lots on the needs of the cache address
buffers (After burner).  At this time I am assuming that they will
be a 44 pin LCC with leads welded on, cost $25, and will be too big
and heavy to go on the back side of the PC board.

I have given the CMUX people feed back on the latest CPU pinout.
I had told them before not to make the first set of changes until
I got feedback on the CPU.  It turns out that they did not need
to make very many changes.

I have continued to keep up with the memory issues involved with
the IOACD.

